i2c-au1550: Fix a misused register problem
Fix a "mis-used register" problem on the AMD MIPS Alchemy au1550 I2C interface. In summary, the programmable serial controller seems to hang the kernel when I send a single 'address' byte on the I2C bus. The patch essentially uses the PSC_SMBSTAT register's TE (transmit FIFO empty) bit to check when the transmit FIFO is empty, instead of using the PSC_SMBEVNT register's TU (transmit underflow) bit. Using the TE bit fixed the hang problem. Signed-off-by: Chris David <cd@chrisdavid.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
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@ -48,17 +48,14 @@ wait_xfer_done(struct i2c_au1550_data *adap)
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sp = (volatile psc_smb_t *)(adap->psc_base);
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/* Wait for Tx FIFO Underflow.
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/* Wait for Tx Buffer Empty
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*/
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for (i = 0; i < adap->xfer_timeout; i++) {
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stat = sp->psc_smbevnt;
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stat = sp->psc_smbstat;
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au_sync();
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if ((stat & PSC_SMBEVNT_TU) != 0) {
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/* Clear it. */
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sp->psc_smbevnt = PSC_SMBEVNT_TU;
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au_sync();
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if ((stat & PSC_SMBSTAT_TE) != 0)
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return 0;
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}
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udelay(1);
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}
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