OMAP2xxx: clock: fix parents for L3-derived clocks
Several clocks are listed as having the core L4 clock as their parent, when they are actually derived from the L3 clock. Fix these. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -1614,7 +1614,7 @@ static struct clk sdma_fck = {
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static struct clk sdma_ick = {
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.name = "sdma_ick",
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.ops = &clkops_omap2_iclk_idle_only,
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.parent = &l4_ck,
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.parent = &core_l3_ck,
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.clkdm_name = "core_l3_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3),
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.enable_bit = OMAP24XX_AUTO_SDMA_SHIFT,
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@ -1652,7 +1652,7 @@ static struct clk sdma_fck = {
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static struct clk sdma_ick = {
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.name = "sdma_ick",
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.ops = &clkops_omap2_iclk_idle_only,
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.parent = &l4_ck,
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.parent = &core_l3_ck,
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.clkdm_name = "core_l3_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3),
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.enable_bit = OMAP24XX_AUTO_SDMA_SHIFT,
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@ -1662,9 +1662,9 @@ static struct clk sdma_ick = {
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static struct clk sdrc_ick = {
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.name = "sdrc_ick",
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.ops = &clkops_omap2_iclk_idle_only,
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.parent = &l4_ck,
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.parent = &core_l3_ck,
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.flags = ENABLE_ON_INIT,
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.clkdm_name = "core_l4_clkdm",
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.clkdm_name = "core_l3_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3),
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.enable_bit = OMAP2430_EN_SDRC_SHIFT,
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.recalc = &followparent_recalc,
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