clk: rockchip: add clock-ids for more rk3228 clocks
This patch exports related BUS/VPU/RGA/HDCP/IEP/TSP/WIFI/ VIO/USB/EFUSE/GPU/CRYPTO clocks for dts reference. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -61,6 +61,17 @@
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#define SCLK_MAC_TX 130
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#define SCLK_MAC_PHY 131
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#define SCLK_MAC_OUT 132
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#define SCLK_VDEC_CABAC 133
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#define SCLK_VDEC_CORE 134
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#define SCLK_RGA 135
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#define SCLK_HDCP 136
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#define SCLK_HDMI_CEC 137
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#define SCLK_CRYPTO 138
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#define SCLK_TSP 139
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#define SCLK_HSADC 140
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#define SCLK_WIFI 141
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#define SCLK_OTGPHY0 142
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#define SCLK_OTGPHY1 143
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/* dclk gates */
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#define DCLK_VOP 190
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@ -68,15 +79,32 @@
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/* aclk gates */
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#define ACLK_DMAC 194
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#define ACLK_CPU 195
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#define ACLK_VPU_PRE 196
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#define ACLK_RKVDEC_PRE 197
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#define ACLK_RGA_PRE 198
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#define ACLK_IEP_PRE 199
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#define ACLK_HDCP_PRE 200
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#define ACLK_VOP_PRE 201
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#define ACLK_VPU 202
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#define ACLK_RKVDEC 203
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#define ACLK_IEP 204
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#define ACLK_RGA 205
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#define ACLK_HDCP 206
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#define ACLK_PERI 210
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#define ACLK_VOP 211
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#define ACLK_GMAC 212
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#define ACLK_GPU 213
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/* pclk gates */
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#define PCLK_GPIO0 320
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#define PCLK_GPIO1 321
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#define PCLK_GPIO2 322
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#define PCLK_GPIO3 323
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#define PCLK_VIO_H2P 324
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#define PCLK_HDCP 325
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#define PCLK_EFUSE_1024 326
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#define PCLK_EFUSE_256 327
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#define PCLK_GRF 329
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#define PCLK_I2C0 332
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#define PCLK_I2C1 333
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@ -89,6 +117,7 @@
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#define PCLK_TSADC 344
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#define PCLK_PWM 350
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#define PCLK_TIMER 353
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#define PCLK_CPU 354
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#define PCLK_PERI 363
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#define PCLK_HDMI_CTRL 364
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#define PCLK_HDMI_PHY 365
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@ -104,6 +133,24 @@
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#define HCLK_SDMMC 456
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#define HCLK_SDIO 457
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#define HCLK_EMMC 459
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#define HCLK_CPU 460
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#define HCLK_VPU_PRE 461
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#define HCLK_RKVDEC_PRE 462
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#define HCLK_VIO_PRE 463
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#define HCLK_VPU 464
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#define HCLK_RKVDEC 465
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#define HCLK_VIO 466
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#define HCLK_RGA 467
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#define HCLK_IEP 468
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#define HCLK_VIO_H2P 469
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#define HCLK_HDCP_MMU 470
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#define HCLK_HOST0 471
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#define HCLK_HOST1 472
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#define HCLK_HOST2 473
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#define HCLK_OTG 474
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#define HCLK_TSP 475
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#define HCLK_M_CRYPTO 476
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#define HCLK_S_CRYPTO 477
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#define HCLK_PERI 478
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#define CLK_NR_CLKS (HCLK_PERI + 1)
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