drm/amdgpu: refine ci uvd dpm code.
Fix up the powergating logic. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Ack-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -889,7 +889,16 @@ static void ci_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate)
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pi->uvd_power_gated = gate;
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ci_update_uvd_dpm(adev, gate);
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if (gate) {
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/* stop the UVD block */
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amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
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AMD_PG_STATE_GATE);
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ci_update_uvd_dpm(adev, gate);
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} else {
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amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
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AMD_PG_STATE_UNGATE);
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ci_update_uvd_dpm(adev, gate);
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}
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}
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static bool ci_dpm_vblank_too_short(struct amdgpu_device *adev)
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