NVMe: Do not set IO queue depth beyond device max
Set the depth for IO queues to the device's maximum supported queue entries if the requested depth exceeds the device's capabilities. Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
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@ -893,7 +893,8 @@ static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
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int depth, int vector)
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int depth, int vector)
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{
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{
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struct device *dmadev = &dev->pci_dev->dev;
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struct device *dmadev = &dev->pci_dev->dev;
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unsigned extra = (depth / 8) + (depth * sizeof(struct nvme_cmd_info));
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unsigned extra = DIV_ROUND_UP(depth, 8) + (depth *
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sizeof(struct nvme_cmd_info));
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struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq) + extra, GFP_KERNEL);
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struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq) + extra, GFP_KERNEL);
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if (!nvmeq)
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if (!nvmeq)
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return NULL;
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return NULL;
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@ -1391,7 +1392,7 @@ static int set_queue_count(struct nvme_dev *dev, int count)
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static int __devinit nvme_setup_io_queues(struct nvme_dev *dev)
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static int __devinit nvme_setup_io_queues(struct nvme_dev *dev)
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{
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{
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int result, cpu, i, nr_io_queues, db_bar_size;
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int result, cpu, i, nr_io_queues, db_bar_size, q_depth;
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nr_io_queues = num_online_cpus();
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nr_io_queues = num_online_cpus();
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result = set_queue_count(dev, nr_io_queues);
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result = set_queue_count(dev, nr_io_queues);
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@ -1437,9 +1438,10 @@ static int __devinit nvme_setup_io_queues(struct nvme_dev *dev)
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cpu = cpumask_next(cpu, cpu_online_mask);
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cpu = cpumask_next(cpu, cpu_online_mask);
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}
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}
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q_depth = min_t(int, NVME_CAP_MQES(readq(&dev->bar->cap)) + 1,
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NVME_Q_DEPTH);
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for (i = 0; i < nr_io_queues; i++) {
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for (i = 0; i < nr_io_queues; i++) {
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dev->queues[i + 1] = nvme_create_queue(dev, i + 1,
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dev->queues[i + 1] = nvme_create_queue(dev, i + 1, q_depth, i);
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NVME_Q_DEPTH, i);
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if (IS_ERR(dev->queues[i + 1]))
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if (IS_ERR(dev->queues[i + 1]))
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return PTR_ERR(dev->queues[i + 1]);
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return PTR_ERR(dev->queues[i + 1]);
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dev->queue_count++;
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dev->queue_count++;
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@ -35,6 +35,7 @@ struct nvme_bar {
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__u64 acq; /* Admin CQ Base Address */
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__u64 acq; /* Admin CQ Base Address */
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};
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};
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#define NVME_CAP_MQES(cap) ((cap) & 0xffff)
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#define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff)
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#define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff)
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#define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf)
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#define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf)
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#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
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#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
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