sh: Titan board support.
Add support for the titan board. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Jamie Lenehan
Paul Mundt
parent
b7e108ee63
commit
a09749dd86
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@ -106,6 +106,7 @@ machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh
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machdir-$(CONFIG_SH_EDOSK7705) := renesas/edosk7705
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machdir-$(CONFIG_SH_SH4202_MICRODEV) := superh/microdev
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machdir-$(CONFIG_SH_LANDISK) := landisk
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machdir-$(CONFIG_SH_TITAN) := titan
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machdir-$(CONFIG_SH_UNKNOWN) := unknown
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incdir-y := $(notdir $(machdir-y))
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@ -0,0 +1,5 @@
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#
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# Makefile for the Nimble Microsystems TITAN specific parts of the kernel
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#
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obj-y := setup.o io.o
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@ -0,0 +1,156 @@
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/*
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* I/O routines for Titan
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*/
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#include <linux/pci.h>
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#include <asm/machvec.h>
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#include <asm/addrspace.h>
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#include <asm/titan.h>
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#include <asm/io.h>
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#include "../../drivers/pci/pci-sh7751.h"
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#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
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#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
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#define PCI_IO_AREA SH7751_PCI_IO_BASE
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#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
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#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
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#if defined(CONFIG_PCI)
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#define CHECK_SH7751_PCIIO(port) \
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((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
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#define CHECK_SH7751_PCIMEMIO(port) \
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((port >= PCIBIOS_MIN_MEM) && (port < (PCIBIOS_MIN_MEM + SH7751_PCI_MEM_SIZE)))
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#else
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#define CHECK_SH7751_PCIIO(port) (0)
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#endif
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static inline void delay(void)
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{
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ctrl_inw(0xa0000000);
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}
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static inline volatile u16 *port2adr(unsigned int port)
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{
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maybebadio((unsigned long)port);
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return (volatile u16*)port;
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}
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u8 titan_inb(unsigned long port)
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{
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if (PXSEG(port))
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return ctrl_inb(port);
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else if (CHECK_SH7751_PCIIO(port))
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return ctrl_inb(PCI_IOMAP(port));
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return ctrl_inw(port2adr(port)) & 0xff;
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}
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u8 titan_inb_p(unsigned long port)
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{
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u8 v;
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if (PXSEG(port))
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v = ctrl_inb(port);
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else if (CHECK_SH7751_PCIIO(port))
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v = ctrl_inb(PCI_IOMAP(port));
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else
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v = ctrl_inw(port2adr(port)) & 0xff;
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delay();
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return v;
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}
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u16 titan_inw(unsigned long port)
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{
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if (PXSEG(port))
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return ctrl_inw(port);
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else if (CHECK_SH7751_PCIIO(port))
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return ctrl_inw(PCI_IOMAP(port));
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else if (port >= 0x2000)
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return ctrl_inw(port2adr(port));
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else
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maybebadio(port);
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return 0;
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}
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u32 titan_inl(unsigned long port)
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{
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if (PXSEG(port))
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return ctrl_inl(port);
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else if (CHECK_SH7751_PCIIO(port))
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return ctrl_inl(PCI_IOMAP(port));
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else if (port >= 0x2000)
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return ctrl_inw(port2adr(port));
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else
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maybebadio(port);
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return 0;
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}
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void titan_outb(u8 value, unsigned long port)
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{
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if (PXSEG(port))
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ctrl_outb(value, port);
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else if (CHECK_SH7751_PCIIO(port))
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ctrl_outb(value, PCI_IOMAP(port));
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else
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ctrl_outw(value, port2adr(port));
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}
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void titan_outb_p(u8 value, unsigned long port)
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{
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if (PXSEG(port))
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ctrl_outb(value, port);
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else if (CHECK_SH7751_PCIIO(port))
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ctrl_outb(value, PCI_IOMAP(port));
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else
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ctrl_outw(value, port2adr(port));
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delay();
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}
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void titan_outw(u16 value, unsigned long port)
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{
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if (PXSEG(port))
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ctrl_outw(value, port);
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else if (CHECK_SH7751_PCIIO(port))
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ctrl_outw(value, PCI_IOMAP(port));
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else if (port >= 0x2000)
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ctrl_outw(value, port2adr(port));
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else
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maybebadio(port);
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}
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void titan_outl(u32 value, unsigned long port)
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{
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if (PXSEG(port))
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ctrl_outl(value, port);
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else if (CHECK_SH7751_PCIIO(port))
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ctrl_outl(value, PCI_IOMAP(port));
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else
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maybebadio(port);
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}
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void titan_insl(unsigned long port, void *dst, unsigned long count)
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{
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maybebadio(port);
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}
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void titan_outsl(unsigned long port, const void *src, unsigned long count)
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{
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maybebadio(port);
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}
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void *titan_ioremap(unsigned long offset, unsigned long size) {
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if (CHECK_SH7751_PCIIO(offset) || CHECK_SH7751_PCIMEMIO(offset))
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return (void *)offset;
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}
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void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
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{
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if (PXSEG(port))
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return (void __iomem *)port;
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else if (CHECK_SH7751_PCIIO(port))
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return (void __iomem *)PCI_IOMAP(port);
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return (void __iomem *)port2adr(port);
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}
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EXPORT_SYMBOL(titan_ioremap);
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@ -0,0 +1,60 @@
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/*
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* Setup for Titan
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*/
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#include <linux/init.h>
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#include <asm/irq.h>
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#include <asm/titan.h>
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#include <asm/io.h>
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extern void __init pcibios_init_platform(void);
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static void __init init_titan_irq(void)
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{
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/* enable individual interrupt mode for externals */
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ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
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make_ipr_irq( TITAN_IRQ_WAN, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY); /* PCIRQ0 */
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make_ipr_irq( TITAN_IRQ_LAN, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY); /* PCIRQ1 */
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make_ipr_irq( TITAN_IRQ_MPCIA, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY); /* PCIRQ2 */
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make_ipr_irq( TITAN_IRQ_USB, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); /* PCIRQ3 */
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}
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const char *get_system_type(void)
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{
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return "Titan";
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}
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int __init platform_setup(void)
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{
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printk("%s Platform Setup\n", get_system_type());
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return 0;
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}
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struct sh_machine_vector mv_titan __initmv = {
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.mv_nr_irqs = NR_IRQS,
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.mv_inb = titan_inb,
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.mv_inw = titan_inw,
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.mv_inl = titan_inl,
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.mv_outb = titan_outb,
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.mv_outw = titan_outw,
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.mv_outl = titan_outl,
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.mv_inb_p = titan_inb_p,
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.mv_inw_p = titan_inw,
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.mv_inl_p = titan_inl,
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.mv_outb_p = titan_outb_p,
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.mv_outw_p = titan_outw,
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.mv_outl_p = titan_outl,
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.mv_insl = titan_insl,
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.mv_outsl = titan_outsl,
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.mv_ioremap = titan_ioremap,
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.mv_ioport_map = titan_ioport_map,
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.mv_init_irq = init_titan_irq,
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.mv_init_pci = pcibios_init_platform,
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};
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ALIAS_MV(titan)
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File diff suppressed because it is too large
Load Diff
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@ -14,3 +14,4 @@ obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
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obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o
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obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
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obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
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obj-$(CONFIG_SH_TITAN) += ops-titan.o
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@ -0,0 +1,84 @@
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/*
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* arch/sh/drivers/pci/ops-titan.c
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*
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* Ported to new API by Paul Mundt <lethal@linux-sh.org>
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*
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* Modified from ops-snapgear.c written by David McCullough
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* Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* PCI initialization for the Titan boards
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <asm/titan.h>
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#include "pci-sh7751.h"
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int __init pcibios_map_platform_irq(u8 slot, u8 pin)
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{
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int irq = -1;
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switch (slot) {
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case 0: irq = TITAN_IRQ_WAN; break; /* eth0 (WAN) */
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case 1: irq = TITAN_IRQ_LAN; break; /* eth1 (LAN) */
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case 2: irq = TITAN_IRQ_MPCIA; break; /* mPCI A */
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case 3: irq = TITAN_IRQ_MPCIB; break; /* mPCI B */
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case 4: irq = TITAN_IRQ_USB; break; /* USB */
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default:
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printk(KERN_INFO "PCI: Bad IRQ mapping request for slot %d\n", slot);
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return -1;
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}
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printk("PCI: Mapping TITAN IRQ for slot %d, pin %c to irq %d\n",
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slot, pin - 1 + 'A', irq);
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return irq;
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}
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static struct resource sh7751_io_resource = {
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.name = "SH7751_IO",
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.start = SH7751_PCI_IO_BASE,
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.end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
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.flags = IORESOURCE_IO
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};
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static struct resource sh7751_mem_resource = {
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.name = "SH7751_mem",
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.start = SH7751_PCI_MEMORY_BASE,
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.end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
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.flags = IORESOURCE_MEM
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};
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extern struct pci_ops sh7751_pci_ops;
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struct pci_channel board_pci_channels[] = {
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{ &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
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{ NULL, NULL, NULL, 0, 0 },
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};
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EXPORT_SYMBOL(board_pci_channels);
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static struct sh7751_pci_address_map sh7751_pci_map = {
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.window0 = {
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.base = SH7751_CS2_BASE_ADDR,
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.size = SH7751_MEM_REGION_SIZE*2, /* cs2 and cs3 */
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},
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.window1 = {
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.base = SH7751_CS2_BASE_ADDR,
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.size = SH7751_MEM_REGION_SIZE*2,
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},
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.flags = SH7751_PCIC_NO_RESET,
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};
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int __init pcibios_init_platform(void)
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{
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return sh7751_pcic_init(&sh7751_pci_map);
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}
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@ -1,21 +1,25 @@
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/* arch/sh/kernel/pci.c
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* $Id: pci.c,v 1.1 2003/08/24 19:15:45 lethal Exp $
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/*
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* arch/sh/drivers/pci/pci.c
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*
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* Copyright (c) 2002 M. R. Brown <mrbrown@linux-sh.org>
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*
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*
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* Copyright (c) 2004, 2005 Paul Mundt <lethal@linux-sh.org>
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*
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* These functions are collected here to reduce duplication of common
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* code amongst the many platform-specific PCI support code files.
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*
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*
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* These routines require the following board-specific routines:
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* void pcibios_fixup_irqs();
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*
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* See include/asm-sh/pci.h for more information.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <asm/io.h>
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static int __init pcibios_init(void)
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{
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@ -26,9 +30,8 @@ static int __init pcibios_init(void)
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#ifdef CONFIG_PCI_AUTO
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/* assign resources */
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busno = 0;
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for (p = board_pci_channels; p->pci_ops != NULL; p++) {
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for (p = board_pci_channels; p->pci_ops != NULL; p++)
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busno = pciauto_assign_resources(busno, p) + 1;
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}
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#endif
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/* scan the buses */
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@ -61,13 +64,17 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root,
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new |= PCI_ROM_ADDRESS_ENABLE;
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reg = dev->rom_base_reg;
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} else {
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/* Somebody might have asked allocation of a non-standard resource */
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/*
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* Somebody might have asked allocation of a non-standard
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* resource
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*/
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return;
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}
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pci_write_config_dword(dev, reg, new);
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pci_read_config_dword(dev, reg, &check);
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if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
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if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ?
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PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
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printk(KERN_ERR "PCI: Error while updating region "
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"%s/%d (%08x != %08x)\n", pci_name(dev), resource,
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new, check);
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@ -145,7 +152,8 @@ void pcibios_set_master(struct pci_dev *dev)
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lat = pcibios_max_latency;
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else
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return;
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printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
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printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
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pci_name(dev), lat);
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pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
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}
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@ -153,3 +161,29 @@ void __init pcibios_update_irq(struct pci_dev *dev, int irq)
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{
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
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}
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void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
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{
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unsigned long start = pci_resource_start(dev, bar);
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unsigned long len = pci_resource_len(dev, bar);
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unsigned long flags = pci_resource_flags(dev, bar);
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if (!len || !start)
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return NULL;
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if (maxlen && len > maxlen)
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len = maxlen;
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if (flags & IORESOURCE_IO)
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return ioport_map(start, len);
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if (flags & IORESOURCE_MEM)
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return ioremap(start, len);
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return NULL;
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}
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void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
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{
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iounmap(addr);
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}
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EXPORT_SYMBOL(pci_iomap);
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EXPORT_SYMBOL(pci_iounmap);
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@ -26,3 +26,4 @@ EDOSK7705 SH_EDOSK7705
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SH4202_MICRODEV SH_SH4202_MICRODEV
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SH03 SH_SH03
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LANDISK SH_LANDISK
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TITAN SH_TITAN
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@ -0,0 +1,43 @@
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/*
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* Platform defintions for Titan
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*/
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#ifndef _ASM_SH_TITAN_TITAN_H
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#define _ASM_SH_TITAN_TITAN_H
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#define __IO_PREFIX titan
|
||||
#include <asm/io_generic.h>
|
||||
|
||||
/* IRQ assignments */
|
||||
#define TITAN_IRQ_WAN 2 /* eth0 (WAN) */
|
||||
#define TITAN_IRQ_LAN 5 /* eth1 (LAN) */
|
||||
#define TITAN_IRQ_MPCIA 8 /* mPCI A */
|
||||
#define TITAN_IRQ_MPCIB 11 /* mPCI B */
|
||||
#define TITAN_IRQ_USB 11 /* USB */
|
||||
|
||||
/*
|
||||
* The external interrupt lines, these take up ints 0 - 15 inclusive
|
||||
* depending on the priority for the interrupt. In fact the priority
|
||||
* is the interrupt :-)
|
||||
*/
|
||||
#define IRL0_IRQ 0
|
||||
#define IRL0_IPR_ADDR INTC_IPRD
|
||||
#define IRL0_IPR_POS 3
|
||||
#define IRL0_PRIORITY 8
|
||||
|
||||
#define IRL1_IRQ 1
|
||||
#define IRL1_IPR_ADDR INTC_IPRD
|
||||
#define IRL1_IPR_POS 2
|
||||
#define IRL1_PRIORITY 8
|
||||
|
||||
#define IRL2_IRQ 2
|
||||
#define IRL2_IPR_ADDR INTC_IPRD
|
||||
#define IRL2_IPR_POS 1
|
||||
#define IRL2_PRIORITY 8
|
||||
|
||||
#define IRL3_IRQ 3
|
||||
#define IRL3_IPR_ADDR INTC_IPRD
|
||||
#define IRL3_IPR_POS 0
|
||||
#define IRL3_PRIORITY 8
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue