RealView: Base support for the PB1176 platform
This patch adds the base files for the PB1176 platform support. Signed-off-by: Bahadir Balban <bahadir.balban@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Bahadir Balban
Catalin Marinas
parent
387847ee0f
commit
a0316b244e
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/*
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* linux/arch/arm/mach-realview/realview_pb1176.c
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*
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* Copyright (C) 2008 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/sysdev.h>
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#include <linux/amba/bus.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/leds.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/gic.h>
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#include <asm/hardware/icst307.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <asm/mach/mmc.h>
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#include <asm/mach/time.h>
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#include <asm/arch/board-pb1176.h>
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#include <asm/arch/irqs.h>
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#include "core.h"
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#include "clock.h"
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static struct map_desc realview_pb1176_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
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.length = SZ_8K,
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.type = MT_DEVICE,
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},
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#ifdef CONFIG_DEBUG_LL
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{
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.virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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#endif
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};
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static void __init realview_pb1176_map_io(void)
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{
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iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
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}
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/*
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* RealView PB1176 AMBA devices
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*/
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#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
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#define GPIO2_DMA { 0, 0 }
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#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
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#define GPIO3_DMA { 0, 0 }
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#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
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#define AACI_DMA { 0x80, 0x81 }
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#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
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#define MMCI0_DMA { 0x84, 0 }
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#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
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#define KMI0_DMA { 0, 0 }
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#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
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#define KMI1_DMA { 0, 0 }
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#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
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#define PB1176_SMC_DMA { 0, 0 }
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#define MPMC_IRQ { NO_IRQ, NO_IRQ }
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#define MPMC_DMA { 0, 0 }
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#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
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#define PB1176_CLCD_DMA { 0, 0 }
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#define DMAC_IRQ { IRQ_PB1176_DMAC, NO_IRQ }
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#define DMAC_DMA { 0, 0 }
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#define SCTL_IRQ { NO_IRQ, NO_IRQ }
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#define SCTL_DMA { 0, 0 }
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#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
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#define PB1176_WATCHDOG_DMA { 0, 0 }
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#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
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#define PB1176_GPIO0_DMA { 0, 0 }
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#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
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#define GPIO1_DMA { 0, 0 }
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#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
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#define PB1176_RTC_DMA { 0, 0 }
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#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
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#define SCI_DMA { 7, 6 }
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#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
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#define PB1176_UART0_DMA { 15, 14 }
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#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
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#define PB1176_UART1_DMA { 13, 12 }
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#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
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#define PB1176_UART2_DMA { 11, 10 }
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#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
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#define PB1176_UART3_DMA { 0x86, 0x87 }
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#define PB1176_SSP_IRQ { IRQ_PB1176_SSP, NO_IRQ }
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#define PB1176_SSP_DMA { 9, 8 }
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/* FPGA Primecells */
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AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
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AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
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AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
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AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
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AMBA_DEVICE(uart3, "fpga:09", PB1176_UART3, NULL);
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/* DevChip Primecells */
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AMBA_DEVICE(smc, "dev:00", PB1176_SMC, NULL);
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AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
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AMBA_DEVICE(wdog, "dev:e1", PB1176_WATCHDOG, NULL);
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AMBA_DEVICE(gpio0, "dev:e4", PB1176_GPIO0, NULL);
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AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
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AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
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AMBA_DEVICE(rtc, "dev:e8", PB1176_RTC, NULL);
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AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
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AMBA_DEVICE(uart0, "dev:f1", PB1176_UART0, NULL);
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AMBA_DEVICE(uart1, "dev:f2", PB1176_UART1, NULL);
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AMBA_DEVICE(uart2, "dev:f3", PB1176_UART2, NULL);
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AMBA_DEVICE(ssp0, "dev:f4", PB1176_SSP, NULL);
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/* Primecells on the NEC ISSP chip */
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AMBA_DEVICE(clcd, "issp:20", PB1176_CLCD, &clcd_plat_data);
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//AMBA_DEVICE(dmac, "issp:30", PB1176_DMAC, NULL);
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static struct amba_device *amba_devs[] __initdata = {
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// &dmac_device,
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&uart0_device,
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&uart1_device,
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&uart2_device,
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&uart3_device,
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&smc_device,
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&clcd_device,
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&sctl_device,
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&wdog_device,
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&gpio0_device,
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&gpio1_device,
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&gpio2_device,
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&rtc_device,
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&sci0_device,
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&ssp0_device,
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&aaci_device,
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&mmc0_device,
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&kmi0_device,
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&kmi1_device,
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};
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/*
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* RealView PB1176 platform devices
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*/
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static struct resource realview_pb1176_flash_resource = {
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.start = REALVIEW_PB1176_FLASH_BASE,
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.end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct resource realview_pb1176_smsc911x_resources[] = {
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[0] = {
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.start = REALVIEW_PB1176_ETH_BASE,
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.end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_PB1176_ETH,
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.end = IRQ_PB1176_ETH,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device realview_pb1176_smsc911x_device = {
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.name = "smc911x",
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.id = 0,
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.num_resources = ARRAY_SIZE(realview_pb1176_smsc911x_resources),
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.resource = realview_pb1176_smsc911x_resources,
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};
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static void __init gic_init_irq(void)
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{
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/* ARM1176 DevChip GIC, primary */
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gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
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gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
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gic_cpu_init(0, gic_cpu_base_addr);
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/* board GIC, secondary */
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gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
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gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
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gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
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}
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static void __init realview_pb1176_timer_init(void)
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{
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timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
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timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
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timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
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timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
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realview_timer_init(IRQ_DC1176_TIMER0);
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}
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static struct sys_timer realview_pb1176_timer = {
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.init = realview_pb1176_timer_init,
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};
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static void __init realview_pb1176_init(void)
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{
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int i;
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/* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
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l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
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clk_register(&realview_clcd_clk);
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realview_flash_register(&realview_pb1176_flash_resource, 1);
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platform_device_register(&realview_pb1176_smsc911x_device);
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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struct amba_device *d = amba_devs[i];
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amba_device_register(d, &iomem_resource);
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}
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#ifdef CONFIG_LEDS
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leds_event = realview_leds_event;
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#endif
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}
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MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
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/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
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.phys_io = REALVIEW_PB1176_UART0_BASE,
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.io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
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.boot_params = 0x00000100,
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.map_io = realview_pb1176_map_io,
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.init_irq = gic_init_irq,
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.timer = &realview_pb1176_timer,
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.init_machine = realview_pb1176_init,
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MACHINE_END
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@ -0,0 +1,152 @@
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/*
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* include/asm-arm/arch-realview/board-pb1176.h
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*
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* Copyright (C) 2008 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __ASM_ARCH_BOARD_PB1176_H
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#define __ASM_ARCH_BOARD_PB1176_H
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#include <asm/arch/platform.h>
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/*
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* Peripheral addresses
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*/
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#define REALVIEW_PB1176_SCTL_BASE 0x10100000 /* System controller */
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#define REALVIEW_PB1176_SMC_BASE 0x10111000 /* SMC */
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#define REALVIEW_PB1176_DMC_BASE 0x10109000 /* DMC configuration */
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#define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
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#define REALVIEW_PB1176_FLASH_BASE 0x30000000
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#define REALVIEW_PB1176_FLASH_SIZE SZ_64M
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#define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */
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#define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */
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#define REALVIEW_PB1176_TIMER4_5_BASE 0x10106000 /* Timer 4 and 5 */
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#define REALVIEW_PB1176_WATCHDOG_BASE 0x10107000 /* watchdog interface */
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#define REALVIEW_PB1176_RTC_BASE 0x10108000 /* Real Time Clock */
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#define REALVIEW_PB1176_GPIO0_BASE 0x1010A000 /* GPIO port 0 */
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#define REALVIEW_PB1176_SSP_BASE 0x1010B000 /* Synchronous Serial Port */
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#define REALVIEW_PB1176_UART0_BASE 0x1010C000 /* UART 0 */
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#define REALVIEW_PB1176_UART1_BASE 0x1010D000 /* UART 1 */
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#define REALVIEW_PB1176_UART2_BASE 0x1010E000 /* UART 2 */
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#define REALVIEW_PB1176_UART3_BASE 0x1010F000 /* UART 3 */
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#define REALVIEW_PB1176_CLCD_BASE 0x10112000 /* CLCD */
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#define REALVIEW_PB1176_ETH_BASE 0x3A000000 /* Ethernet */
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#define REALVIEW_PB1176_USB_BASE 0x3B000000 /* USB */
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/*
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* PCI regions
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*/
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#define REALVIEW_PB1176_PCI_BASE 0x60000000 /* PCI self config */
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#define REALVIEW_PB1176_PCI_CFG_BASE 0x61000000 /* PCI config */
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#define REALVIEW_PB1176_PCI_IO_BASE0 0x62000000 /* PCI IO region */
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#define REALVIEW_PB1176_PCI_MEM_BASE0 0x63000000 /* Memory region 1 */
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#define REALVIEW_PB1176_PCI_MEM_BASE1 0x64000000 /* Memory region 2 */
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#define REALVIEW_PB1176_PCI_MEM_BASE2 0x68000000 /* Memory region 3 */
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#define REALVIEW_PB1176_PCI_BASE_SIZE 0x01000000 /* 16MB */
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#define REALVIEW_PB1176_PCI_CFG_BASE_SIZE 0x01000000 /* 16MB */
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#define REALVIEW_PB1176_PCI_IO_BASE0_SIZE 0x01000000 /* 16MB */
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#define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE 0x01000000 /* 16MB */
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#define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE 0x04000000 /* 64MB */
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#define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE 0x08000000 /* 128MB */
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#define REALVIEW_DC1176_GIC_CPU_BASE 0x10120000 /* GIC CPU interface, on devchip */
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#define REALVIEW_DC1176_GIC_DIST_BASE 0x10121000 /* GIC distributor, on devchip */
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#define REALVIEW_PB1176_GIC_CPU_BASE 0x10040000 /* GIC CPU interface, on FPGA */
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#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
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#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
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/*
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* Irqs
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*/
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#define IRQ_DC1176_GIC_START 32
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#define IRQ_PB1176_GIC_START 64
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/*
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* ARM1176 DevChip interrupt sources (primary GIC)
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*/
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#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
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#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
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#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
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#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
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#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
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#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
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#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
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#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
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#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
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#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
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#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
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#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
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#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
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#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
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#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
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#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
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|
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/*
|
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* RealView PB1176 interrupt sources (secondary GIC)
|
||||
*/
|
||||
#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
|
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#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
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#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
|
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#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
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#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
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#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
|
||||
#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
|
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#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
|
||||
#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
|
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#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
|
||||
#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
|
||||
|
||||
#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
|
||||
|
||||
#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
|
||||
|
||||
#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
|
||||
#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
|
||||
#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
|
||||
|
||||
#define IRQ_PB1176_GPIO0 -1
|
||||
#define IRQ_PB1176_SSP -1
|
||||
#define IRQ_PB1176_SCTL -1
|
||||
|
||||
#define NR_GIC_PB1176 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PB1176
|
||||
*/
|
||||
#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PB1176)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PB1176
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PB1176
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PB1176 */
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_PB1176_H */
|
||||
|
|
@ -24,6 +24,7 @@
|
|||
|
||||
#include <asm/arch/board-eb.h>
|
||||
#include <asm/arch/board-pb11mp.h>
|
||||
#include <asm/arch/board-pb1176.h>
|
||||
|
||||
#define IRQ_LOCALTIMER 29
|
||||
#define IRQ_LOCALWDOG 30
|
||||
|
|
|
|||
Loading…
Reference in New Issue