Second Round of Renesas ARM Based SoC DT Fixes for v3.14

Correct i2c clock references for r8a7790 (R-Car H2) SoC
 
 The error was introduced in 72197ca7a1 ("ARM: shmobile: r8a7790:
 Reference clocks") which is queued up for v3.14.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.15 (GNU/Linux)
 
 iQIcBAABAgAGBQJS4b3VAAoJENfPZGlqN0++soAP/33lDjmDES2ACWrgJ0EHX9h3
 H0w36L6aOvL2vaTSZYmTnf0VrzuHUpiTmGCWZSboumxaiKZfcPYqKii+SV+OdHjW
 Ua5Cz6v+F8uqlz/Ziw04rKneUpdg+EGYIrR2tjLP11BNAJCqSJ3bjcR8TbmUfeTN
 yyzEiN7MqWoT+JiUub9PBZkI/yIylqHnDc/a4vcNjKMmN5Y5CTEKLNgwmt2Cpv5F
 1XLNPcUwvwLOnKFCReoXey1OqJLODfDLhwsuyQInkF5U3FZNT91Ly6WG1KTJuBEE
 Acx7AAppoOAdH2Y85TQv67qPIuY/tOeosSXtrV/F2lOIe2xccGPcrMNtYydrQdfg
 u8pmz+Nwr3I4Vwg1fx/Jqdht0nqv53B4BKqgSGkemubdJAPFct78yt8LJuDfCiZD
 TCETU/N0pO/LDF+SL81/kLNmVlogCQwZmeLg4v/vImZ08pyeriOeOJPCfHE+cUur
 sUofqrJKZubVWQOrfojjOni2YDgM5p3CnrpLocLC1rtclYRIp6UpnbEGShQovW2Y
 j+fBBz+APlIcLn6bBvaEVIkcnmwqH7jHUUn0/3R6sx8m+706FEqhYA2QRTDTCH2R
 TQ58MNzzN7wlkXYa5RGbjiEoQfqlzFFzfx+6SfvOTmDLlia5M1vG+mXLR7EmLgnG
 9ZRGxBwTIuTTOEttxep/
 =UVOK
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-fixes2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Second Round of Renesas ARM Based SoC DT Fixes for v3.14

Correct i2c clock references for r8a7790 (R-Car H2) SoC

The error was introduced in 72197ca7a1 ("ARM: shmobile: r8a7790:
Reference clocks") which is queued up for v3.14.

* tag 'renesas-dt-fixes2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790.dtsi: ficx i2c[0-3] clock reference

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-01-31 15:08:10 -08:00
commit a00928f558
1 changed files with 4 additions and 4 deletions

View File

@ -197,7 +197,7 @@
reg = <0 0xe6508000 0 0x40>; reg = <0 0xe6508000 0 0x40>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_I2C0>; clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
status = "disabled"; status = "disabled";
}; };
@ -208,7 +208,7 @@
reg = <0 0xe6518000 0 0x40>; reg = <0 0xe6518000 0 0x40>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_I2C1>; clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
status = "disabled"; status = "disabled";
}; };
@ -219,7 +219,7 @@
reg = <0 0xe6530000 0 0x40>; reg = <0 0xe6530000 0 0x40>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_I2C2>; clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
status = "disabled"; status = "disabled";
}; };
@ -230,7 +230,7 @@
reg = <0 0xe6540000 0 0x40>; reg = <0 0xe6540000 0 0x40>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_I2C3>; clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
status = "disabled"; status = "disabled";
}; };