sh-mobile: add support for displays, connected over the MIPI bus
Some SH-mobile SoCs have a MIPI DSI controller, that can be used to connect MIPI displays to LCDC. This patch adds a platform driver for SH-mobile MIPI DSI unit. It uses existing hooks in the sh_mobile_lcdcfb.c driver for display activation and deactivation. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by: Damian Hobson-Garcia <dhobsong@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Guennadi Liakhovetski
Paul Mundt
parent
1430e006a3
commit
9fd04fe34a
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@ -1879,6 +1879,13 @@ config FB_W100
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If unsure, say N.
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config SH_MIPI_DSI
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tristate
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depends on (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
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config SH_LCD_MIPI_DSI
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bool
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config FB_SH_MOBILE_LCDC
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tristate "SuperH Mobile LCDC framebuffer support"
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depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
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@ -1887,6 +1894,7 @@ config FB_SH_MOBILE_LCDC
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select FB_SYS_IMAGEBLIT
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select FB_SYS_FOPS
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select FB_DEFERRED_IO
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select SH_MIPI_DSI if SH_LCD_MIPI_DSI
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---help---
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Frame buffer driver for the on-chip SH-Mobile LCD controller.
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@ -123,6 +123,7 @@ obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o
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obj-$(CONFIG_FB_PS3) += ps3fb.o
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obj-$(CONFIG_FB_SM501) += sm501fb.o
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obj-$(CONFIG_FB_XILINX) += xilinxfb.o
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obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o
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obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o
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obj-$(CONFIG_FB_OMAP) += omap/
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obj-y += omap2/
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@ -0,0 +1,505 @@
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/*
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* Renesas SH-mobile MIPI DSI support
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*
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* Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <video/mipi_display.h>
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#include <video/sh_mipi_dsi.h>
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#include <video/sh_mobile_lcdc.h>
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#define CMTSRTCTR 0x80d0
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#define CMTSRTREQ 0x8070
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#define DSIINTE 0x0060
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/* E.g., sh7372 has 2 MIPI-DSIs - one for each LCDC */
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#define MAX_SH_MIPI_DSI 2
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struct sh_mipi {
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void __iomem *base;
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struct clk *dsit_clk;
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struct clk *dsip_clk;
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};
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static struct sh_mipi *mipi_dsi[MAX_SH_MIPI_DSI];
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/* Protect the above array */
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static DEFINE_MUTEX(array_lock);
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static struct sh_mipi *sh_mipi_by_handle(int handle)
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{
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if (handle >= ARRAY_SIZE(mipi_dsi) || handle < 0)
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return NULL;
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return mipi_dsi[handle];
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}
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static int sh_mipi_send_short(struct sh_mipi *mipi, u8 dsi_cmd,
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u8 cmd, u8 param)
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{
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u32 data = (dsi_cmd << 24) | (cmd << 16) | (param << 8);
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int cnt = 100;
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/* transmit a short packet to LCD panel */
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iowrite32(1 | data, mipi->base + 0x80d0); /* CMTSRTCTR */
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iowrite32(1, mipi->base + 0x8070); /* CMTSRTREQ */
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while ((ioread32(mipi->base + 0x8070) & 1) && --cnt)
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udelay(1);
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return cnt ? 0 : -ETIMEDOUT;
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}
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#define LCD_CHAN2MIPI(c) ((c) < LCDC_CHAN_MAINLCD || (c) > LCDC_CHAN_SUBLCD ? \
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-EINVAL : (c) - 1)
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static int sh_mipi_dcs(int handle, u8 cmd)
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{
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struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
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if (!mipi)
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return -ENODEV;
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return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE, cmd, 0);
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}
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static int sh_mipi_dcs_param(int handle, u8 cmd, u8 param)
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{
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struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
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if (!mipi)
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return -ENODEV;
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return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE_PARAM, cmd,
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param);
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}
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static void sh_mipi_dsi_enable(struct sh_mipi *mipi, bool enable)
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{
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/*
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* enable LCDC data tx, transition to LPS after completion of each HS
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* packet
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*/
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iowrite32(0x00000002 | enable, mipi->base + 0x8000); /* DTCTR */
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}
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static void sh_mipi_shutdown(struct platform_device *pdev)
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{
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struct sh_mipi *mipi = platform_get_drvdata(pdev);
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sh_mipi_dsi_enable(mipi, false);
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}
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static void mipi_display_on(void *arg)
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{
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struct sh_mipi *mipi = arg;
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sh_mipi_dsi_enable(mipi, true);
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}
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static void mipi_display_off(void *arg)
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{
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struct sh_mipi *mipi = arg;
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sh_mipi_dsi_enable(mipi, false);
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}
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static int __init sh_mipi_setup(struct sh_mipi *mipi,
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struct sh_mipi_dsi_info *pdata)
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{
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void __iomem *base = mipi->base;
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struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
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u32 pctype, datatype, pixfmt;
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u32 linelength;
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bool yuv;
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/* Select data format */
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switch (pdata->data_format) {
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case MIPI_RGB888:
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pctype = 0;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
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pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
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linelength = ch->lcd_cfg.xres * 3;
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yuv = false;
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break;
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case MIPI_RGB565:
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pctype = 1;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
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pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
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linelength = ch->lcd_cfg.xres * 2;
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yuv = false;
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break;
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case MIPI_RGB666_LP:
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pctype = 2;
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datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
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pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
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linelength = ch->lcd_cfg.xres * 3;
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yuv = false;
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break;
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case MIPI_RGB666:
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pctype = 3;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
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pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
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linelength = (ch->lcd_cfg.xres * 18 + 7) / 8;
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yuv = false;
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break;
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case MIPI_BGR888:
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pctype = 8;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
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pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
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linelength = ch->lcd_cfg.xres * 3;
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yuv = false;
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break;
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case MIPI_BGR565:
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pctype = 9;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
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pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
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linelength = ch->lcd_cfg.xres * 2;
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yuv = false;
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break;
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case MIPI_BGR666_LP:
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pctype = 0xa;
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datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
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pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
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linelength = ch->lcd_cfg.xres * 3;
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yuv = false;
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break;
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case MIPI_BGR666:
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pctype = 0xb;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
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pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
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linelength = (ch->lcd_cfg.xres * 18 + 7) / 8;
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yuv = false;
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break;
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case MIPI_YUYV:
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pctype = 4;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
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pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
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linelength = ch->lcd_cfg.xres * 2;
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yuv = true;
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break;
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case MIPI_UYVY:
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pctype = 5;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
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pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
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linelength = ch->lcd_cfg.xres * 2;
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yuv = true;
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break;
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case MIPI_YUV420_L:
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pctype = 6;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
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pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
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linelength = (ch->lcd_cfg.xres * 12 + 7) / 8;
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yuv = true;
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break;
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case MIPI_YUV420:
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pctype = 7;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
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pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
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/* Length of U/V line */
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linelength = (ch->lcd_cfg.xres + 1) / 2;
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yuv = true;
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break;
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default:
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return -EINVAL;
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}
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if ((yuv && ch->interface_type != YUV422) ||
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(!yuv && ch->interface_type != RGB24))
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return -EINVAL;
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/* reset DSI link */
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iowrite32(0x00000001, base); /* SYSCTRL */
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/* Hold reset for 100 cycles of the slowest of bus, HS byte and LP clock */
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udelay(50);
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iowrite32(0x00000000, base); /* SYSCTRL */
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/* setup DSI link */
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/*
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* Default = ULPS enable |
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* Contention detection enabled |
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* EoT packet transmission enable |
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* CRC check enable |
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* ECC check enable
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* additionally enable first two lanes
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*/
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iowrite32(0x00003703, base + 0x04); /* SYSCONF */
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/*
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* T_wakeup = 0x7000
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* T_hs-trail = 3
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* T_hs-prepare = 3
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* T_clk-trail = 3
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* T_clk-prepare = 2
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*/
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iowrite32(0x70003332, base + 0x08); /* TIMSET */
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/* no responses requested */
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iowrite32(0x00000000, base + 0x18); /* RESREQSET0 */
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/* request response to packets of type 0x28 */
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iowrite32(0x00000100, base + 0x1c); /* RESREQSET1 */
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/* High-speed transmission timeout, default 0xffffffff */
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iowrite32(0x0fffffff, base + 0x20); /* HSTTOVSET */
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/* LP reception timeout, default 0xffffffff */
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iowrite32(0x0fffffff, base + 0x24); /* LPRTOVSET */
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/* Turn-around timeout, default 0xffffffff */
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iowrite32(0x0fffffff, base + 0x28); /* TATOVSET */
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/* Peripheral reset timeout, default 0xffffffff */
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iowrite32(0x0fffffff, base + 0x2c); /* PRTOVSET */
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/* Enable timeout counters */
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iowrite32(0x00000f00, base + 0x30); /* DSICTRL */
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/* Interrupts not used, disable all */
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iowrite32(0, base + DSIINTE);
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/* DSI-Tx bias on */
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iowrite32(0x00000001, base + 0x70); /* PHYCTRL */
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udelay(200);
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/* Deassert resets, power on, set multiplier */
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iowrite32(0x03070b01, base + 0x70); /* PHYCTRL */
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/* setup l-bridge */
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/*
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* Enable transmission of all packets,
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* transmit LPS after each HS packet completion
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*/
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iowrite32(0x00000006, base + 0x8000); /* DTCTR */
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/* VSYNC width = 2 (<< 17) */
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iowrite32(0x00040000 | (pctype << 12) | datatype, base + 0x8020); /* VMCTR1 */
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/*
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* Non-burst mode with sync pulses: VSE and HSE are output,
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* HSA period allowed, no commands in LP
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*/
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iowrite32(0x00e00000, base + 0x8024); /* VMCTR2 */
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/*
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* 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
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* sh_mobile_lcdc_info.ch[0].lcd_cfg.xres), HSALEN = 1 - default
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* (unused, since VMCTR2[HSABM] = 0)
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*/
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iowrite32(1 | (linelength << 16), base + 0x8028); /* VMLEN1 */
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msleep(5);
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/* setup LCD panel */
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/* cf. drivers/video/omap/lcd_mipid.c */
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sh_mipi_dcs(ch->chan, MIPI_DCS_EXIT_SLEEP_MODE);
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msleep(120);
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/*
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* [7] - Page Address Mode
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* [6] - Column Address Mode
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* [5] - Page / Column Address Mode
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* [4] - Display Device Line Refresh Order
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* [3] - RGB/BGR Order
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* [2] - Display Data Latch Data Order
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* [1] - Flip Horizontal
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* [0] - Flip Vertical
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*/
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sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
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/* cf. set_data_lines() */
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sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_PIXEL_FORMAT,
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pixfmt << 4);
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sh_mipi_dcs(ch->chan, MIPI_DCS_SET_DISPLAY_ON);
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return 0;
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}
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static int __init sh_mipi_probe(struct platform_device *pdev)
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{
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struct sh_mipi *mipi;
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struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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unsigned long rate, f_current;
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int idx = pdev->id, ret;
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char dsip_clk[] = "dsi.p_clk";
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if (!res || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
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return -ENODEV;
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mutex_lock(&array_lock);
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if (idx < 0)
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for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
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;
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if (idx == ARRAY_SIZE(mipi_dsi)) {
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ret = -EBUSY;
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goto efindslot;
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}
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mipi = kzalloc(sizeof(*mipi), GFP_KERNEL);
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if (!mipi) {
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ret = -ENOMEM;
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goto ealloc;
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}
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if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
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dev_err(&pdev->dev, "MIPI register region already claimed\n");
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ret = -EBUSY;
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goto ereqreg;
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}
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mipi->base = ioremap(res->start, resource_size(res));
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if (!mipi->base) {
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ret = -ENOMEM;
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goto emap;
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}
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mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
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if (IS_ERR(mipi->dsit_clk)) {
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ret = PTR_ERR(mipi->dsit_clk);
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goto eclktget;
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}
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f_current = clk_get_rate(mipi->dsit_clk);
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/* 80MHz required by the datasheet */
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rate = clk_round_rate(mipi->dsit_clk, 80000000);
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if (rate > 0 && rate != f_current)
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ret = clk_set_rate(mipi->dsit_clk, rate);
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else
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ret = rate;
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if (ret < 0)
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goto esettrate;
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dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
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sprintf(dsip_clk, "dsi%1.1dp_clk", idx);
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mipi->dsip_clk = clk_get(&pdev->dev, dsip_clk);
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if (IS_ERR(mipi->dsip_clk)) {
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ret = PTR_ERR(mipi->dsip_clk);
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goto eclkpget;
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}
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f_current = clk_get_rate(mipi->dsip_clk);
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/* Between 10 and 50MHz */
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rate = clk_round_rate(mipi->dsip_clk, 24000000);
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if (rate > 0 && rate != f_current)
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ret = clk_set_rate(mipi->dsip_clk, rate);
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else
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ret = rate;
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if (ret < 0)
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goto esetprate;
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|
||||
dev_dbg(&pdev->dev, "DSI-P clk %lu -> %lu\n", f_current, rate);
|
||||
|
||||
msleep(10);
|
||||
|
||||
ret = clk_enable(mipi->dsit_clk);
|
||||
if (ret < 0)
|
||||
goto eclkton;
|
||||
|
||||
ret = clk_enable(mipi->dsip_clk);
|
||||
if (ret < 0)
|
||||
goto eclkpon;
|
||||
|
||||
mipi_dsi[idx] = mipi;
|
||||
|
||||
ret = sh_mipi_setup(mipi, pdata);
|
||||
if (ret < 0)
|
||||
goto emipisetup;
|
||||
|
||||
mutex_unlock(&array_lock);
|
||||
platform_set_drvdata(pdev, mipi);
|
||||
|
||||
/* Set up LCDC callbacks */
|
||||
pdata->lcd_chan->board_cfg.board_data = mipi;
|
||||
pdata->lcd_chan->board_cfg.display_on = mipi_display_on;
|
||||
pdata->lcd_chan->board_cfg.display_off = mipi_display_off;
|
||||
|
||||
return 0;
|
||||
|
||||
emipisetup:
|
||||
mipi_dsi[idx] = NULL;
|
||||
clk_disable(mipi->dsip_clk);
|
||||
eclkpon:
|
||||
clk_disable(mipi->dsit_clk);
|
||||
eclkton:
|
||||
esetprate:
|
||||
clk_put(mipi->dsip_clk);
|
||||
eclkpget:
|
||||
esettrate:
|
||||
clk_put(mipi->dsit_clk);
|
||||
eclktget:
|
||||
iounmap(mipi->base);
|
||||
emap:
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
ereqreg:
|
||||
kfree(mipi);
|
||||
ealloc:
|
||||
efindslot:
|
||||
mutex_unlock(&array_lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __exit sh_mipi_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
struct sh_mipi *mipi = platform_get_drvdata(pdev);
|
||||
int i, ret;
|
||||
|
||||
mutex_lock(&array_lock);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mipi_dsi) && mipi_dsi[i] != mipi; i++)
|
||||
;
|
||||
|
||||
if (i == ARRAY_SIZE(mipi_dsi)) {
|
||||
ret = -EINVAL;
|
||||
} else {
|
||||
ret = 0;
|
||||
mipi_dsi[i] = NULL;
|
||||
}
|
||||
|
||||
mutex_unlock(&array_lock);
|
||||
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
pdata->lcd_chan->board_cfg.display_on = NULL;
|
||||
pdata->lcd_chan->board_cfg.display_off = NULL;
|
||||
pdata->lcd_chan->board_cfg.board_data = NULL;
|
||||
|
||||
clk_disable(mipi->dsip_clk);
|
||||
clk_disable(mipi->dsit_clk);
|
||||
clk_put(mipi->dsit_clk);
|
||||
clk_put(mipi->dsip_clk);
|
||||
iounmap(mipi->base);
|
||||
if (res)
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
kfree(mipi);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver sh_mipi_driver = {
|
||||
.remove = __exit_p(sh_mipi_remove),
|
||||
.shutdown = sh_mipi_shutdown,
|
||||
.driver = {
|
||||
.name = "sh-mipi-dsi",
|
||||
},
|
||||
};
|
||||
|
||||
static int __init sh_mipi_init(void)
|
||||
{
|
||||
return platform_driver_probe(&sh_mipi_driver, sh_mipi_probe);
|
||||
}
|
||||
module_init(sh_mipi_init);
|
||||
|
||||
static void __exit sh_mipi_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&sh_mipi_driver);
|
||||
}
|
||||
module_exit(sh_mipi_exit);
|
||||
|
||||
MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
|
||||
MODULE_DESCRIPTION("SuperH / ARM-shmobile MIPI DSI driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* Public SH-mobile MIPI DSI header
|
||||
*
|
||||
* Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef VIDEO_SH_MIPI_DSI_H
|
||||
#define VIDEO_SH_MIPI_DSI_H
|
||||
|
||||
enum sh_mipi_dsi_data_fmt {
|
||||
MIPI_RGB888,
|
||||
MIPI_RGB565,
|
||||
MIPI_RGB666_LP,
|
||||
MIPI_RGB666,
|
||||
MIPI_BGR888,
|
||||
MIPI_BGR565,
|
||||
MIPI_BGR666_LP,
|
||||
MIPI_BGR666,
|
||||
MIPI_YUYV,
|
||||
MIPI_UYVY,
|
||||
MIPI_YUV420_L,
|
||||
MIPI_YUV420,
|
||||
};
|
||||
|
||||
struct sh_mobile_lcdc_chan_cfg;
|
||||
|
||||
struct sh_mipi_dsi_info {
|
||||
enum sh_mipi_dsi_data_fmt data_format;
|
||||
struct sh_mobile_lcdc_chan_cfg *lcd_chan;
|
||||
};
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue