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[ALSA] Update AT91 ASoC driver for 2.6.19 kernel. 

Changes were required to support latest AT91 header files.
Also updated to remove AT91RM9200-specific code in the ASoC
platform drivers to support the AT91SAM9260 and AT91SAM9261
chips, but no testing was performed on these chips.

Signed-off-by: Frank Mandarino <fmandarino@endrelia.com>
Signed-off-by: Liam Girdwood <lg@opensource.wolfsonmicro.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jaroslav Kysela <perex@suse.cz>
This commit is contained in:
Frank Mandarino 2006-11-24 15:49:39 +01:00 committed by Jaroslav Kysela
parent a9e996604f
commit 9f0ac6e1a8
5 changed files with 380 additions and 389 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
sound/soc/at91/Makefile
View File

@ -1,6 +1,6 @@
# AT91 Platform Support
snd-soc-at91-objs := at91rm9200-pcm.o
snd-soc-at91-i2s-objs := at91rm9200-i2s.o
snd-soc-at91-objs := at91-pcm.o
snd-soc-at91-i2s-objs := at91-i2s.o
obj-$(CONFIG_SND_AT91_SOC) += snd-soc-at91.o
obj-$(CONFIG_SND_AT91_SOC_I2S) += snd-soc-at91-i2s.o

444
sound/soc/at91/at91rm9200-i2s.c → sound/soc/at91/at91-i2s.c
View File

@ -1,5 +1,5 @@
/*
* at91rm9200-i2s.c -- ALSA Soc Audio Layer Platform driver and DMA engine
* at91-i2s.c -- ALSA SoC I2S Audio Layer Platform driver
*
* Author: Frank Mandarino <fmandarino@endrelia.com>
* Endrelia Technologies Inc.
@ -28,34 +28,41 @@
#include <sound/initval.h>
#include <sound/soc.h>
#include <asm/arch/at91rm9200.h>
#include <asm/arch/at91rm9200_ssc.h>
#include <asm/arch/at91rm9200_pdc.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_ssc.h>
#include <asm/arch/at91_pdc.h>
#include "at91rm9200-pcm.h"
#include "at91-pcm.h"
#if 0
#define DBG(x...) printk(KERN_DEBUG "at91rm9200-i2s:" x)
#define DBG(x...) printk(KERN_DEBUG "at91-i2s:" x)
#else
#define DBG(x...)
#endif
#define AT91RM9200_I2S_DAIFMT \
#if defined(CONFIG_ARCH_AT91SAM9260)
#define NUM_SSC_DEVICES 1
#else
#define NUM_SSC_DEVICES 3
#endif
#define AT91_I2S_DAIFMT \
(SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_NB_NF)
#define AT91RM9200_I2S_DIR \
#define AT91_I2S_DIR \
(SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
/* priv is (SSC_CMR.DIV << 16 | SSC_TCMR.PERIOD ) */
static struct snd_soc_dai_mode at91rm9200_i2s[] = {
static struct snd_soc_dai_mode at91_i2s[] = {
/* 8k: BCLK = (MCLK/10) = (60MHz/50) = 1.2MHz */
{
.fmt = AT91RM9200_I2S_DAIFMT,
.fmt = AT91_I2S_DAIFMT,
.pcmfmt = SNDRV_PCM_FMTBIT_S16_LE,
.pcmrate = SNDRV_PCM_RATE_8000,
.pcmdir = AT91RM9200_I2S_DIR,
.pcmdir = AT91_I2S_DIR,
.flags = SND_SOC_DAI_BFS_DIV,
.fs = 1500,
.bfs = SND_SOC_FSBD(10),
@ -64,10 +71,10 @@ static struct snd_soc_dai_mode at91rm9200_i2s[] = {
/* 16k: BCLK = (MCLK/3) ~= (60MHz/14) = 4.285714MHz */
{
.fmt = AT91RM9200_I2S_DAIFMT,
.fmt = AT91_I2S_DAIFMT,
.pcmfmt = SNDRV_PCM_FMTBIT_S16_LE,
.pcmrate = SNDRV_PCM_RATE_16000,
.pcmdir = AT91RM9200_I2S_DIR,
.pcmdir = AT91_I2S_DIR,
.flags = SND_SOC_DAI_BFS_DIV,
.fs = 750,
.bfs = SND_SOC_FSBD(3),
@ -76,10 +83,10 @@ static struct snd_soc_dai_mode at91rm9200_i2s[] = {
/* 32k: BCLK = (MCLK/3) ~= (60MHz/14) = 4.285714MHz */
{
.fmt = AT91RM9200_I2S_DAIFMT,
.fmt = AT91_I2S_DAIFMT,
.pcmfmt = SNDRV_PCM_FMTBIT_S16_LE,
.pcmrate = SNDRV_PCM_RATE_32000,
.pcmdir = AT91RM9200_I2S_DIR,
.pcmdir = AT91_I2S_DIR,
.flags = SND_SOC_DAI_BFS_DIV,
.fs = 375,
.bfs = SND_SOC_FSBD(3),
@ -88,10 +95,10 @@ static struct snd_soc_dai_mode at91rm9200_i2s[] = {
/* 48k: BCLK = (MCLK/5) ~= (60MHz/26) = 2.3076923MHz */
{
.fmt = AT91RM9200_I2S_DAIFMT,
.fmt = AT91_I2S_DAIFMT,
.pcmfmt = SNDRV_PCM_FMTBIT_S16_LE,
.pcmrate = SNDRV_PCM_RATE_48000,
.pcmdir = AT91RM9200_I2S_DIR,
.pcmdir = AT91_I2S_DIR,
.flags = SND_SOC_DAI_BFS_DIV,
.fs = 250,
.bfs SND_SOC_FSBD(5),
@ -101,78 +108,26 @@ static struct snd_soc_dai_mode at91rm9200_i2s[] = {
/*
* SSC registers required by the PCM DMA engine.
* SSC PDC registers required by the PCM DMA engine.
*/
static struct at91rm9200_ssc_regs ssc_reg[3] = {
{
.cr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_SSC_CR),
.ier = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_SSC_IER),
.idr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_SSC_IDR),
},
{
.cr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_SSC_CR),
.ier = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_SSC_IER),
.idr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_SSC_IDR),
},
{
.cr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_SSC_CR),
.ier = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_SSC_IER),
.idr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_SSC_IDR),
},
static struct at91_pdc_regs pdc_tx_reg = {
.xpr = AT91_PDC_TPR,
.xcr = AT91_PDC_TCR,
.xnpr = AT91_PDC_TNPR,
.xncr = AT91_PDC_TNCR,
};
static struct at91rm9200_pdc_regs pdc_tx_reg[3] = {
{
.xpr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_TPR),
.xcr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_TCR),
.xnpr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_TNPR),
.xncr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_TNCR),
.ptcr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_PTCR),
},
{
.xpr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_TPR),
.xcr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_TCR),
.xnpr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_TNPR),
.xncr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_TNCR),
.ptcr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_PTCR),
},
{
.xpr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_TPR),
.xcr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_TCR),
.xnpr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_TNPR),
.xncr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_TNCR),
.ptcr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_PTCR),
},
};
static struct at91rm9200_pdc_regs pdc_rx_reg[3] = {
{
.xpr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_RPR),
.xcr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_RCR),
.xnpr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_RNPR),
.xncr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_RNCR),
.ptcr = (void __iomem *) (AT91_VA_BASE_SSC0 + AT91_PDC_PTCR),
},
{
.xpr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_RPR),
.xcr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_RCR),
.xnpr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_RNPR),
.xncr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_RNCR),
.ptcr = (void __iomem *) (AT91_VA_BASE_SSC1 + AT91_PDC_PTCR),
},
{
.xpr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_RPR),
.xcr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_RCR),
.xnpr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_RNPR),
.xncr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_RNCR),
.ptcr = (void __iomem *) (AT91_VA_BASE_SSC2 + AT91_PDC_PTCR),
},
static struct at91_pdc_regs pdc_rx_reg = {
.xpr = AT91_PDC_RPR,
.xcr = AT91_PDC_RCR,
.xnpr = AT91_PDC_RNPR,
.xncr = AT91_PDC_RNCR,
};
/*
* SSC & PDC status bits for transmit and receive.
*/
static struct at91rm9200_ssc_mask ssc_tx_mask = {
static struct at91_ssc_mask ssc_tx_mask = {
.ssc_enable = AT91_SSC_TXEN,
.ssc_disable = AT91_SSC_TXDIS,
.ssc_endx = AT91_SSC_ENDTX,
@ -181,7 +136,7 @@ static struct at91rm9200_ssc_mask ssc_tx_mask = {
.pdc_disable = AT91_PDC_TXTDIS,
};
static struct at91rm9200_ssc_mask ssc_rx_mask = {
static struct at91_ssc_mask ssc_rx_mask = {
.ssc_enable = AT91_SSC_RXEN,
.ssc_disable = AT91_SSC_RXDIS,
.ssc_endx = AT91_SSC_ENDRX,
@ -190,6 +145,46 @@ static struct at91rm9200_ssc_mask ssc_rx_mask = {
.pdc_disable = AT91_PDC_RXTDIS,
};
/*
* DMA parameters.
*/
static struct at91_pcm_dma_params ssc_dma_params[NUM_SSC_DEVICES][2] = {
{{
.name = "SSC0/I2S PCM Stereo out",
.pdc = &pdc_tx_reg,
.mask = &ssc_tx_mask,
},
{
.name = "SSC0/I2S PCM Stereo in",
.pdc = &pdc_rx_reg,
.mask = &ssc_rx_mask,
}},
#if NUM_SSC_DEVICES == 3
{{
.name = "SSC1/I2S PCM Stereo out",
.pdc = &pdc_tx_reg,
.mask = &ssc_tx_mask,
},
{
.name = "SSC1/I2S PCM Stereo in",
.pdc = &pdc_rx_reg,
.mask = &ssc_rx_mask,
}},
{{
.name = "SSC2/I2S PCM Stereo out",
.pdc = &pdc_tx_reg,
.mask = &ssc_tx_mask,
},
{
.name = "SSC1/I2S PCM Stereo in",
.pdc = &pdc_rx_reg,
.mask = &ssc_rx_mask,
}},
#endif
};
/*
* A MUTEX is used to protect an SSC initialzed flag which allows
* the substream hw_params() call to initialize the SSC only if
@ -198,53 +193,13 @@ static struct at91rm9200_ssc_mask ssc_rx_mask = {
* it is using the same format and rate.
*/
static DECLARE_MUTEX(ssc0_mutex);
#if NUM_SSC_DEVICES == 3
static DECLARE_MUTEX(ssc1_mutex);
static DECLARE_MUTEX(ssc2_mutex);
/*
* DMA parameters.
*/
static at91rm9200_pcm_dma_params_t ssc_dma_params[3][2] = {
{{
.name = "SSC0/I2S PCM Stereo out",
.ssc = &ssc_reg[0],
.pdc = &pdc_tx_reg[0],
.mask = &ssc_tx_mask,
},
{
.name = "SSC0/I2S PCM Stereo in",
.ssc = &ssc_reg[0],
.pdc = &pdc_rx_reg[0],
.mask = &ssc_rx_mask,
}},
{{
.name = "SSC1/I2S PCM Stereo out",
.ssc = &ssc_reg[1],
.pdc = &pdc_tx_reg[1],
.mask = &ssc_tx_mask,
},
{
.name = "SSC1/I2S PCM Stereo in",
.ssc = &ssc_reg[1],
.pdc = &pdc_rx_reg[1],
.mask = &ssc_rx_mask,
}},
{{
.name = "SSC2/I2S PCM Stereo out",
.ssc = &ssc_reg[2],
.pdc = &pdc_tx_reg[2],
.mask = &ssc_tx_mask,
},
{
.name = "SSC1/I2S PCM Stereo in",
.ssc = &ssc_reg[2],
.pdc = &pdc_rx_reg[2],
.mask = &ssc_rx_mask,
}},
};
#endif
struct at91rm9200_ssc_state {
struct at91_ssc_state {
u32 ssc_cmr;
u32 ssc_rcmr;
u32 ssc_rfmr;
@ -254,33 +209,30 @@ struct at91rm9200_ssc_state {
u32 ssc_imr;
};
static struct at91rm9200_ssc_info {
static struct at91_ssc_info {
char *name;
void __iomem *ssc_base;
u32 pid;
struct at91_ssc_periph ssc;
spinlock_t lock; /* lock for dir_mask */
int dir_mask; /* 0=unused, 1=playback, 2=capture */
struct semaphore *mutex;
int initialized;
int pcmfmt;
int rate;
at91rm9200_pcm_dma_params_t *dma_params[2];
struct at91rm9200_ssc_state ssc_state;
struct at91_pcm_dma_params *dma_params[2];
struct at91_ssc_state ssc_state;
} ssc_info[3] = {
} ssc_info[NUM_SSC_DEVICES] = {
{
.name = "ssc0",
.ssc_base = (void __iomem *) AT91_VA_BASE_SSC0,
.pid = AT91_ID_SSC0,
.lock = SPIN_LOCK_UNLOCKED,
.dir_mask = 0,
.mutex = &ssc0_mutex,
.initialized = 0,
},
#if NUM_SSC_DEVICES == 3
{
.name = "ssc1",
.ssc_base = (void __iomem *) AT91_VA_BASE_SSC1,
.pid = AT91_ID_SSC1,
.lock = SPIN_LOCK_UNLOCKED,
.dir_mask = 0,
.mutex = &ssc1_mutex,
@ -288,25 +240,24 @@ static struct at91rm9200_ssc_info {
},
{
.name = "ssc2",
.ssc_base = (void __iomem *) AT91_VA_BASE_SSC2,
.pid = AT91_ID_SSC2,
.lock = SPIN_LOCK_UNLOCKED,
.dir_mask = 0,
.mutex = &ssc2_mutex,
.initialized = 0,
},
#endif
};
static irqreturn_t at91rm9200_i2s_interrupt(int irq, void *dev_id)
static irqreturn_t at91_i2s_interrupt(int irq, void *dev_id)
{
struct at91rm9200_ssc_info *ssc_p = dev_id;
at91rm9200_pcm_dma_params_t *dma_params;
struct at91_ssc_info *ssc_p = dev_id;
struct at91_pcm_dma_params *dma_params;
u32 ssc_sr;
int i;
ssc_sr = at91_ssc_read(ssc_p->ssc_base + AT91_SSC_SR)
& at91_ssc_read(ssc_p->ssc_base + AT91_SSC_IMR);
ssc_sr = at91_ssc_read(ssc_p->ssc.base + AT91_SSC_SR)
& at91_ssc_read(ssc_p->ssc.base + AT91_SSC_IMR);
/*
* Loop through the substreams attached to this SSC. If
@ -327,14 +278,14 @@ static irqreturn_t at91rm9200_i2s_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
static int at91rm9200_i2s_startup(struct snd_pcm_substream *substream)
static int at91_i2s_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct at91rm9200_ssc_info *ssc_p = &ssc_info[rtd->cpu_dai->id];
struct at91_ssc_info *ssc_p = &ssc_info[rtd->cpu_dai->id];
int dir_mask;
DBG("i2s_startup: SSC_SR=0x%08lx\n",
at91_ssc_read(ssc_p->ssc_base + AT91_SSC_SR));
at91_ssc_read(ssc_p->ssc.base + AT91_SSC_SR));
dir_mask = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0x1 : 0x2;
spin_lock_irq(&ssc_p->lock);
@ -348,20 +299,22 @@ static int at91rm9200_i2s_startup(struct snd_pcm_substream *substream)
return 0;
}
static void at91rm9200_i2s_shutdown(struct snd_pcm_substream *substream)
static void at91_i2s_shutdown(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct at91rm9200_ssc_info *ssc_p = &ssc_info[rtd->cpu_dai->id];
at91rm9200_pcm_dma_params_t *dma_params = rtd->cpu_dai->dma_data;
struct at91_ssc_info *ssc_p = &ssc_info[rtd->cpu_dai->id];
struct at91_pcm_dma_params *dma_params = rtd->cpu_dai->dma_data;
int dir, dir_mask;
dir = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0 : 1;
if (dma_params != NULL) {
at91_ssc_write(dma_params->ssc->cr, dma_params->mask->ssc_disable);
at91_ssc_write(dma_params->ssc_base + AT91_SSC_CR,
dma_params->mask->ssc_disable);
DBG("%s disabled SSC_SR=0x%08lx\n", (dir ? "receive" : "transmit"),
at91_ssc_read(ssc_p->ssc_base + AT91_SSC_SR));
at91_ssc_read(ssc_p->ssc.base + AT91_SSC_SR));
dma_params->ssc_base = NULL;
dma_params->substream = NULL;
ssc_p->dma_params[dir] = NULL;
}
@ -372,14 +325,14 @@ static void at91rm9200_i2s_shutdown(struct snd_pcm_substream *substream)
ssc_p->dir_mask &= ~dir_mask;
if (!ssc_p->dir_mask) {
/* Shutdown the SSC clock. */
DBG("Stopping pid %d clock\n", ssc_p->pid);
at91_sys_write(AT91_PMC_PCDR, 1<<ssc_p->pid);
DBG("Stopping pid %d clock\n", ssc_p->ssc.pid);
at91_sys_write(AT91_PMC_PCDR, 1<<ssc_p->ssc.pid);
if (ssc_p->initialized)
free_irq(ssc_p->pid, ssc_p);
free_irq(ssc_p->ssc.pid, ssc_p);
/* Reset the SSC */
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_CR, AT91_SSC_SWRST);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_CR, AT91_SSC_SWRST);
/* Force a re-init on the next hw_params() call. */
ssc_p->initialized = 0;
@ -388,10 +341,10 @@ static void at91rm9200_i2s_shutdown(struct snd_pcm_substream *substream)
}
#ifdef CONFIG_PM
static int at91rm9200_i2s_suspend(struct platform_device *pdev,
static int at91_i2s_suspend(struct platform_device *pdev,
struct snd_soc_cpu_dai *dai)
{
struct at91rm9200_ssc_info *ssc_p;
struct at91_ssc_info *ssc_p;
if(!dai->active)
return 0;
@ -399,27 +352,27 @@ static int at91rm9200_i2s_suspend(struct platform_device *pdev,
ssc_p = &ssc_info[dai->id];
/* Save the status register before disabling transmit and receive. */
ssc_p->state->ssc_sr = at91_ssc_read(ssc_p->ssc_base + AT91_SSC_SR);
at91_ssc_write(ssc_p->ssc_base +
ssc_p->state->ssc_sr = at91_ssc_read(ssc_p->ssc.base + AT91_SSC_SR);
at91_ssc_write(ssc_p->ssc.base +
AT91_SSC_CR, AT91_SSC_TXDIS | AT91_SSC_RXDIS);
/* Save the current interrupt mask, then disable unmasked interrupts. */
ssc_p->state->ssc_imr = at91_ssc_read(ssc_p->ssc_base + AT91_SSC_IMR);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_IDR, ssc_p->state->ssc_imr);
ssc_p->state->ssc_imr = at91_ssc_read(ssc_p->ssc.base + AT91_SSC_IMR);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_IDR, ssc_p->state->ssc_imr);
ssc_p->state->ssc_cmr = at91_ssc_read(ssc_p->ssc_base + AT91_SSC_CMR);
ssc_p->state->ssc_rcmr = at91_ssc_read(ssc_p->ssc_base + AT91_SSC_RCMR);
ssc_p->state->ssc_rfmr = at91_ssc_read(ssc_p->ssc_base + AT91_SSC_RCMR);
ssc_p->state->ssc_tcmr = at91_ssc_read(ssc_p->ssc_base + AT91_SSC_RCMR);
ssc_p->state->ssc_tfmr = at91_ssc_read(ssc_p->ssc_base + AT91_SSC_RCMR);
ssc_p->state->ssc_cmr = at91_ssc_read(ssc_p->ssc.base + AT91_SSC_CMR);
ssc_p->state->ssc_rcmr = at91_ssc_read(ssc_p->ssc.base + AT91_SSC_RCMR);
ssc_p->state->ssc_rfmr = at91_ssc_read(ssc_p->ssc.base + AT91_SSC_RCMR);
ssc_p->state->ssc_tcmr = at91_ssc_read(ssc_p->ssc.base + AT91_SSC_RCMR);
ssc_p->state->ssc_tfmr = at91_ssc_read(ssc_p->ssc.base + AT91_SSC_RCMR);
return 0;
}
static int at91rm9200_i2s_resume(struct platform_device *pdev,
static int at91_i2s_resume(struct platform_device *pdev,
struct snd_soc_cpu_dai *dai)
{
struct at91rm9200_ssc_info *ssc_p;
struct at91_ssc_info *ssc_p;
u32 cr_mask;
if(!dai->active)
@ -427,15 +380,15 @@ static int at91rm9200_i2s_resume(struct platform_device *pdev,
ssc_p = &ssc_info[dai->id];
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_RCMR, ssc_p->state->ssc_tfmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_RCMR, ssc_p->state->ssc_tcmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_RCMR, ssc_p->state->ssc_rfmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_RCMR, ssc_p->state->ssc_rcmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_CMR, ssc_p->state->ssc_cmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_RCMR, ssc_p->state->ssc_tfmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_RCMR, ssc_p->state->ssc_tcmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_RCMR, ssc_p->state->ssc_rfmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_RCMR, ssc_p->state->ssc_rcmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_CMR, ssc_p->state->ssc_cmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_IER, ssc_p->state->ssc_imr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_IER, ssc_p->state->ssc_imr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_CR,
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_CR,
((ssc_p->state->ssc_sr & AT91_SSC_RXENA) ? AT91_SSC_RXEN : 0) |
((ssc_p->state->ssc_sr & AT91_SSC_TXENA) ? AT91_SSC_TXEN : 0));
@ -443,11 +396,11 @@ static int at91rm9200_i2s_resume(struct platform_device *pdev,
}
#else
#define at91rm9200_i2s_suspend NULL
#define at91rm9200_i2s_resume NULL
#define at91_i2s_suspend NULL
#define at91_i2s_resume NULL
#endif
static unsigned int at91rm9200_i2s_config_sysclk(
static unsigned int at91_i2s_config_sysclk(
struct snd_soc_cpu_dai *iface, struct snd_soc_clock_info *info,
unsigned int clk)
{
@ -457,17 +410,16 @@ static unsigned int at91rm9200_i2s_config_sysclk(
return 12000000;
}
static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
static int at91_i2s_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
int id = rtd->cpu_dai->id;
struct at91rm9200_ssc_info *ssc_p = &ssc_info[id];
at91rm9200_pcm_dma_params_t *dma_params;
struct at91_ssc_info *ssc_p = &ssc_info[id];
struct at91_pcm_dma_params *dma_params;
unsigned int pcmfmt, rate;
int dir, channels, bits;
struct clk *mck_clk;
unsigned long bclk;
u32 div, period, tfmr, rfmr, tcmr, rcmr;
int ret;
@ -479,6 +431,7 @@ static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
dir = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0 : 1;
dma_params = &ssc_dma_params[id][dir];
dma_params->ssc_base = ssc_p->ssc.base;
dma_params->substream = substream;
ssc_p->dma_params[dir] = dma_params;
@ -495,7 +448,7 @@ static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
dma_params->pdc_xfer_size = 2;
break;
default:
printk(KERN_WARNING "at91rm9200-i2s: unsupported format %x\n",
printk(KERN_WARNING "at91-i2s: unsupported format %x\n",
pcmfmt);
return -EINVAL;
}
@ -509,46 +462,45 @@ static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
*/
if (ssc_p->initialized) {
if (pcmfmt != ssc_p->pcmfmt || rate != ssc_p->rate) {
printk(KERN_WARNING "at91rm9200-i2s: "
printk(KERN_WARNING "at91-i2s: "
"incompatible substream in other direction\n");
up(ssc_p->mutex);
return -EINVAL;
}
} else {
/* Enable PMC peripheral clock for this SSC */
DBG("Starting pid %d clock\n", ssc_p->pid);
at91_sys_write(AT91_PMC_PCER, 1<<ssc_p->pid);
DBG("Starting pid %d clock\n", ssc_p->ssc.pid);
at91_sys_write(AT91_PMC_PCER, 1<<ssc_p->ssc.pid);
/* Reset the SSC */
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_CR, AT91_SSC_SWRST);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_CR, AT91_SSC_SWRST);
at91_ssc_write(ssc_p->ssc_base + AT91_PDC_RPR, 0);
at91_ssc_write(ssc_p->ssc_base + AT91_PDC_RCR, 0);
at91_ssc_write(ssc_p->ssc_base + AT91_PDC_RNPR, 0);
at91_ssc_write(ssc_p->ssc_base + AT91_PDC_RNCR, 0);
at91_ssc_write(ssc_p->ssc_base + AT91_PDC_TPR, 0);
at91_ssc_write(ssc_p->ssc_base + AT91_PDC_TCR, 0);
at91_ssc_write(ssc_p->ssc_base + AT91_PDC_TNPR, 0);
at91_ssc_write(ssc_p->ssc_base + AT91_PDC_TNCR, 0);
mck_clk = clk_get(NULL, "mck");
at91_ssc_write(ssc_p->ssc.base + AT91_PDC_RPR, 0);
at91_ssc_write(ssc_p->ssc.base + AT91_PDC_RCR, 0);
at91_ssc_write(ssc_p->ssc.base + AT91_PDC_RNPR, 0);
at91_ssc_write(ssc_p->ssc.base + AT91_PDC_RNCR, 0);
at91_ssc_write(ssc_p->ssc.base + AT91_PDC_TPR, 0);
at91_ssc_write(ssc_p->ssc.base + AT91_PDC_TCR, 0);
at91_ssc_write(ssc_p->ssc.base + AT91_PDC_TNPR, 0);
at91_ssc_write(ssc_p->ssc.base + AT91_PDC_TNCR, 0);
div = rtd->cpu_dai->dai_runtime.priv >> 16;
period = rtd->cpu_dai->dai_runtime.priv & 0xffff;
bclk = 60000000 / (2 * div);
DBG("mck %ld fsbd %d bfs %d bfs_real %d bclk %ld div %d period %d\n",
mck_clk = clk_get(NULL, "mck");
DBG("mck %lu fsbd %u bfs %llu bfs_real %u bclk %lu div %u period %u\n",
clk_get_rate(mck_clk),
SND_SOC_FSBD(6),
rtd->cpu_dai->dai_runtime.bfs,
SND_SOC_FSBD_REAL(rtd->cpu_dai->dai_runtime.bfs),
bclk,
clk_get_rate(mck_clk) / (2 * div),
div,
period);
clk_put(mck_clk);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_CMR, div);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_CMR, div);
/*
* Setup the TFMR and RFMR for the proper data format.
@ -563,7 +515,7 @@ static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
| (( 0 << 5) & AT91_SSC_DATDEF)
| (((bits - 1) << 0) & AT91_SSC_DATALEN);
DBG("SSC_TFMR=0x%08x\n", tfmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_TFMR, tfmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_TFMR, tfmr);
rfmr =
(( AT91_SSC_FSEDGE_POSITIVE ) & AT91_SSC_FSEDGE)
@ -575,7 +527,7 @@ static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
| (((bits - 1) << 0) & AT91_SSC_DATALEN);
DBG("SSC_RFMR=0x%08x\n", rfmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_RFMR, rfmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_RFMR, rfmr);
/*
* Setup the TCMR and RCMR to generate the proper BCLK
@ -590,7 +542,7 @@ static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
| (( AT91_SSC_CKS_DIV ) & AT91_SSC_CKS);
DBG("SSC_TCMR=0x%08x\n", tcmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_TCMR, tcmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_TCMR, tcmr);
rcmr =
(( 0 << 24) & AT91_SSC_PERIOD)
@ -601,11 +553,11 @@ static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
| (( AT91_SSC_CKS_CLOCK ) & AT91_SSC_CKS);
DBG("SSC_RCMR=0x%08x\n", rcmr);
at91_ssc_write(ssc_p->ssc_base + AT91_SSC_RCMR, rcmr);
at91_ssc_write(ssc_p->ssc.base + AT91_SSC_RCMR, rcmr);
if ((ret = request_irq(ssc_p->pid, at91rm9200_i2s_interrupt,
if ((ret = request_irq(ssc_p->ssc.pid, at91_i2s_interrupt,
0, ssc_p->name, ssc_p)) < 0) {
printk(KERN_WARNING "at91rm9200-i2s: request_irq failure\n");
printk(KERN_WARNING "at91-i2s: request_irq failure\n");
return ret;
}
@ -627,27 +579,28 @@ static int at91rm9200_i2s_hw_params(struct snd_pcm_substream *substream,
}
static int at91rm9200_i2s_prepare(struct snd_pcm_substream *substream)
static int at91_i2s_prepare(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
at91rm9200_pcm_dma_params_t *dma_params = rtd->cpu_dai->dma_data;
struct at91_pcm_dma_params *dma_params = rtd->cpu_dai->dma_data;
at91_ssc_write(dma_params->ssc->cr, dma_params->mask->ssc_enable);
at91_ssc_write(dma_params->ssc_base + AT91_SSC_CR,
dma_params->mask->ssc_enable);
DBG("%s enabled SSC_SR=0x%08lx\n",
substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? "transmit" : "receive",
at91_ssc_read(ssc_info[rtd->cpu_dai->id].ssc_base + AT91_SSC_SR));
at91_ssc_read(ssc_info[rtd->cpu_dai->id].ssc.base + AT91_SSC_SR));
return 0;
}
struct snd_soc_cpu_dai at91rm9200_i2s_dai[] = {
{ .name = "at91rm9200-ssc0/i2s",
struct snd_soc_cpu_dai at91_i2s_dai[NUM_SSC_DEVICES] = {
{ .name = "at91_ssc0/i2s",
.id = 0,
.type = SND_SOC_DAI_I2S,
.suspend = at91rm9200_i2s_suspend,
.resume = at91rm9200_i2s_resume,
.config_sysclk = at91rm9200_i2s_config_sysclk,
.suspend = at91_i2s_suspend,
.resume = at91_i2s_resume,
.config_sysclk = at91_i2s_config_sysclk,
.playback = {
.channels_min = 1,
.channels_max = 2,},
@ -655,20 +608,22 @@ struct snd_soc_cpu_dai at91rm9200_i2s_dai[] = {
.channels_min = 1,
.channels_max = 2,},
.ops = {
.startup = at91rm9200_i2s_startup,
.shutdown = at91rm9200_i2s_shutdown,
.prepare = at91rm9200_i2s_prepare,
.hw_params = at91rm9200_i2s_hw_params,},
.startup = at91_i2s_startup,
.shutdown = at91_i2s_shutdown,
.prepare = at91_i2s_prepare,
.hw_params = at91_i2s_hw_params,},
.caps = {
.mode = &at91rm9200_i2s[0],
.num_modes = ARRAY_SIZE(at91rm9200_i2s),},
.mode = &at91_i2s[0],
.num_modes = ARRAY_SIZE(at91_i2s),},
.private_data = &ssc_info[0].ssc,
},
{ .name = "at91rm9200-ssc1/i2s",
#if NUM_SSC_DEVICES == 3
{ .name = "at91_ssc1/i2s",
.id = 1,
.type = SND_SOC_DAI_I2S,
.suspend = at91rm9200_i2s_suspend,
.resume = at91rm9200_i2s_resume,
.config_sysclk = at91rm9200_i2s_config_sysclk,
.suspend = at91_i2s_suspend,
.resume = at91_i2s_resume,
.config_sysclk = at91_i2s_config_sysclk,
.playback = {
.channels_min = 1,
.channels_max = 2,},
@ -676,20 +631,21 @@ struct snd_soc_cpu_dai at91rm9200_i2s_dai[] = {
.channels_min = 1,
.channels_max = 2,},
.ops = {
.startup = at91rm9200_i2s_startup,
.shutdown = at91rm9200_i2s_shutdown,
.prepare = at91rm9200_i2s_prepare,
.hw_params = at91rm9200_i2s_hw_params,},
.startup = at91_i2s_startup,
.shutdown = at91_i2s_shutdown,
.prepare = at91_i2s_prepare,
.hw_params = at91_i2s_hw_params,},
.caps = {
.mode = &at91rm9200_i2s[0],
.num_modes = ARRAY_SIZE(at91rm9200_i2s),},
.mode = &at91_i2s[0],
.num_modes = ARRAY_SIZE(at91_i2s),},
.private_data = &ssc_info[1].ssc,
},
{ .name = "at91rm9200-ssc2/i2s",
{ .name = "at91_ssc2/i2s",
.id = 2,
.type = SND_SOC_DAI_I2S,
.suspend = at91rm9200_i2s_suspend,
.resume = at91rm9200_i2s_resume,
.config_sysclk = at91rm9200_i2s_config_sysclk,
.suspend = at91_i2s_suspend,
.resume = at91_i2s_resume,
.config_sysclk = at91_i2s_config_sysclk,
.playback = {
.channels_min = 1,
.channels_max = 2,},
@ -697,19 +653,21 @@ struct snd_soc_cpu_dai at91rm9200_i2s_dai[] = {
.channels_min = 1,
.channels_max = 2,},
.ops = {
.startup = at91rm9200_i2s_startup,
.shutdown = at91rm9200_i2s_shutdown,
.prepare = at91rm9200_i2s_prepare,
.hw_params = at91rm9200_i2s_hw_params,},
.startup = at91_i2s_startup,
.shutdown = at91_i2s_shutdown,
.prepare = at91_i2s_prepare,
.hw_params = at91_i2s_hw_params,},
.caps = {
.mode = &at91rm9200_i2s[0],
.num_modes = ARRAY_SIZE(at91rm9200_i2s),},
.mode = &at91_i2s[0],
.num_modes = ARRAY_SIZE(at91_i2s),},
.private_data = &ssc_info[2].ssc,
},
#endif
};
EXPORT_SYMBOL_GPL(at91rm9200_i2s_dai);
EXPORT_SYMBOL_GPL(at91_i2s_dai);
/* Module information */
MODULE_AUTHOR("Frank Mandarino, fmandarino@endrelia.com, www.endrelia.com");
MODULE_DESCRIPTION("AT91RM9200 I2S ASoC Interface");
MODULE_DESCRIPTION("AT91 I2S ASoC Interface");
MODULE_LICENSE("GPL");

203
sound/soc/at91/at91rm9200-pcm.c → sound/soc/at91/at91-pcm.c
View File

@ -1,5 +1,5 @@
/*
* at91rm9200-pcm.c -- ALSA PCM interface for the Atmel AT91RM9200 chip.
* at91-pcm.c -- ALSA PCM interface for the Atmel AT91 SoC
*
* Author: Frank Mandarino <fmandarino@endrelia.com>
* Endrelia Technologies Inc.
@ -28,20 +28,19 @@
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <asm/arch/at91rm9200.h>
#include <asm/arch/at91rm9200_ssc.h>
#include <asm/arch/at91rm9200_pdc.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_ssc.h>
#include <asm/arch/at91_pdc.h>
#include "at91rm9200-pcm.h"
#include "at91-pcm.h"
#if 0
#define DBG(x...) printk(KERN_INFO "at91rm9200-pcm: " x)
#define DBG(x...) printk(KERN_INFO "at91-pcm: " x)
#else
#define DBG(x...)
#endif
static const snd_pcm_hardware_t at91rm9200_pcm_hardware = {
static const struct snd_pcm_hardware at91_pcm_hardware = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_INTERLEAVED |
@ -54,8 +53,8 @@ static const snd_pcm_hardware_t at91rm9200_pcm_hardware = {
.buffer_bytes_max = 32 * 1024,
};
struct at91rm9200_runtime_data {
at91rm9200_pcm_dma_params_t *params;
struct at91_runtime_data {
struct at91_pcm_dma_params *params;
dma_addr_t dma_buffer; /* physical address of dma buffer */
dma_addr_t dma_buffer_end; /* first address beyond DMA buffer */
size_t period_size;
@ -66,11 +65,11 @@ struct at91rm9200_runtime_data {
u32 pdc_xncr_save;
};
static void at91rm9200_pcm_dma_irq(u32 ssc_sr,
static void at91_pcm_dma_irq(u32 ssc_sr,
struct snd_pcm_substream *substream)
{
struct at91rm9200_runtime_data *prtd = substream->runtime->private_data;
at91rm9200_pcm_dma_params_t *params = prtd->params;
struct at91_runtime_data *prtd = substream->runtime->private_data;
struct at91_pcm_dma_params *params = prtd->params;
static int count = 0;
count++;
@ -78,24 +77,24 @@ static void at91rm9200_pcm_dma_irq(u32 ssc_sr,
if (ssc_sr & params->mask->ssc_endbuf) {
printk(KERN_WARNING
"at91rm9200-pcm: buffer %s on %s (SSC_SR=%#x, count=%d)\n",
"at91-pcm: buffer %s on %s (SSC_SR=%#x, count=%d)\n",
substream->stream == SNDRV_PCM_STREAM_PLAYBACK
? "underrun" : "overrun",
params->name, ssc_sr, count);
/* re-start the PDC */
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_disable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
prtd->period_ptr += prtd->period_size;
if (prtd->period_ptr >= prtd->dma_buffer_end) {
prtd->period_ptr = prtd->dma_buffer;
}
at91_ssc_write(params->pdc->xpr, prtd->period_ptr);
at91_ssc_write(params->pdc->xcr,
at91_ssc_write(params->ssc_base + params->pdc->xpr, prtd->period_ptr);
at91_ssc_write(params->ssc_base + params->pdc->xcr,
prtd->period_size / params->pdc_xfer_size);
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_enable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_enable);
}
if (ssc_sr & params->mask->ssc_endx) {
@ -105,19 +104,19 @@ static void at91rm9200_pcm_dma_irq(u32 ssc_sr,
if (prtd->period_ptr >= prtd->dma_buffer_end) {
prtd->period_ptr = prtd->dma_buffer;
}
at91_ssc_write(params->pdc->xnpr, prtd->period_ptr);
at91_ssc_write(params->pdc->xncr,
at91_ssc_write(params->ssc_base + params->pdc->xnpr, prtd->period_ptr);
at91_ssc_write(params->ssc_base + params->pdc->xncr,
prtd->period_size / params->pdc_xfer_size);
}
snd_pcm_period_elapsed(substream);
}
static int at91rm9200_pcm_hw_params(struct snd_pcm_substream *substream,
static int at91_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
snd_pcm_runtime_t *runtime = substream->runtime;
struct at91rm9200_runtime_data *prtd = runtime->private_data;
struct snd_pcm_runtime *runtime = substream->runtime;
struct at91_runtime_data *prtd = runtime->private_data;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
/* this may get called several times by oss emulation
@ -127,7 +126,7 @@ static int at91rm9200_pcm_hw_params(struct snd_pcm_substream *substream,
runtime->dma_bytes = params_buffer_bytes(params);
prtd->params = rtd->cpu_dai->dma_data;
prtd->params->dma_intr_handler = at91rm9200_pcm_dma_irq;
prtd->params->dma_intr_handler = at91_pcm_dma_irq;
prtd->dma_buffer = runtime->dma_addr;
prtd->dma_buffer_end = runtime->dma_addr + runtime->dma_bytes;
@ -138,76 +137,76 @@ static int at91rm9200_pcm_hw_params(struct snd_pcm_substream *substream,
return 0;
}
static int at91rm9200_pcm_hw_free(struct snd_pcm_substream *substream)
static int at91_pcm_hw_free(struct snd_pcm_substream *substream)
{
struct at91rm9200_runtime_data *prtd = substream->runtime->private_data;
at91rm9200_pcm_dma_params_t *params = prtd->params;
struct at91_runtime_data *prtd = substream->runtime->private_data;
struct at91_pcm_dma_params *params = prtd->params;
if (params != NULL) {
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_disable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
prtd->params->dma_intr_handler = NULL;
}
return 0;
}
static int at91rm9200_pcm_prepare(struct snd_pcm_substream *substream)
static int at91_pcm_prepare(struct snd_pcm_substream *substream)
{
struct at91rm9200_runtime_data *prtd = substream->runtime->private_data;
at91rm9200_pcm_dma_params_t *params = prtd->params;
struct at91_runtime_data *prtd = substream->runtime->private_data;
struct at91_pcm_dma_params *params = prtd->params;
at91_ssc_write(params->ssc->idr,
at91_ssc_write(params->ssc_base + AT91_SSC_IDR,
params->mask->ssc_endx | params->mask->ssc_endbuf);
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_disable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
return 0;
}
static int at91rm9200_pcm_trigger(struct snd_pcm_substream *substream,
static int at91_pcm_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct at91rm9200_runtime_data *prtd = substream->runtime->private_data;
at91rm9200_pcm_dma_params_t *params = prtd->params;
struct at91_runtime_data *prtd = substream->runtime->private_data;
struct at91_pcm_dma_params *params = prtd->params;
int ret = 0;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
prtd->period_ptr = prtd->dma_buffer;
at91_ssc_write(params->pdc->xpr, prtd->period_ptr);
at91_ssc_write(params->pdc->xcr,
at91_ssc_write(params->ssc_base + params->pdc->xpr, prtd->period_ptr);
at91_ssc_write(params->ssc_base + params->pdc->xcr,
prtd->period_size / params->pdc_xfer_size);
prtd->period_ptr += prtd->period_size;
at91_ssc_write(params->pdc->xnpr, prtd->period_ptr);
at91_ssc_write(params->pdc->xncr,
at91_ssc_write(params->ssc_base + params->pdc->xnpr, prtd->period_ptr);
at91_ssc_write(params->ssc_base + params->pdc->xncr,
prtd->period_size / params->pdc_xfer_size);
DBG("trigger: period_ptr=%lx, xpr=%lx, xcr=%ld, xnpr=%lx, xncr=%ld\n",
(unsigned long) prtd->period_ptr,
at91_ssc_read(params->pdc->xpr),
at91_ssc_read(params->pdc->xcr),
at91_ssc_read(params->pdc->xnpr),
at91_ssc_read(params->pdc->xncr));
at91_ssc_read(params->ssc_base + params->pdc->xpr),
at91_ssc_read(params->ssc_base + params->pdc->xcr),
at91_ssc_read(params->ssc_base + params->pdc->xnpr),
at91_ssc_read(params->ssc_base + params->pdc->xncr));
at91_ssc_write(params->ssc->ier,
at91_ssc_write(params->ssc_base + AT91_SSC_IER,
params->mask->ssc_endx | params->mask->ssc_endbuf);
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_enable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_enable);
DBG("sr=%lx imr=%lx\n", at91_ssc_read(params->ssc->ier - 4),
at91_ssc_read(params->ssc->ier + 8));
DBG("sr=%lx imr=%lx\n", at91_ssc_read(params->ssc_base + AT91_SSC_SR),
at91_ssc_read(params->ssc_base + AT91_SSC_IER));
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_disable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
break;
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_enable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_enable);
break;
default:
@ -217,16 +216,16 @@ static int at91rm9200_pcm_trigger(struct snd_pcm_substream *substream,
return ret;
}
static snd_pcm_uframes_t at91rm9200_pcm_pointer(
static snd_pcm_uframes_t at91_pcm_pointer(
struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct at91rm9200_runtime_data *prtd = runtime->private_data;
at91rm9200_pcm_dma_params_t *params = prtd->params;
struct at91_runtime_data *prtd = runtime->private_data;
struct at91_pcm_dma_params *params = prtd->params;
dma_addr_t ptr;
snd_pcm_uframes_t x;
ptr = (dma_addr_t) at91_ssc_read(params->pdc->xpr);
ptr = (dma_addr_t) at91_ssc_read(params->ssc_base + params->pdc->xpr);
x = bytes_to_frames(runtime, ptr - prtd->dma_buffer);
if (x == runtime->buffer_size)
@ -234,20 +233,20 @@ static snd_pcm_uframes_t at91rm9200_pcm_pointer(
return x;
}
static int at91rm9200_pcm_open(struct snd_pcm_substream *substream)
static int at91_pcm_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct at91rm9200_runtime_data *prtd;
struct at91_runtime_data *prtd;
int ret = 0;
snd_soc_set_runtime_hwparams(substream, &at91rm9200_pcm_hardware);
snd_soc_set_runtime_hwparams(substream, &at91_pcm_hardware);
/* ensure that buffer size is a multiple of period size */
ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
if (ret < 0)
goto out;
prtd = kzalloc(sizeof(struct at91rm9200_runtime_data), GFP_KERNEL);
prtd = kzalloc(sizeof(struct at91_runtime_data), GFP_KERNEL);
if (prtd == NULL) {
ret = -ENOMEM;
goto out;
@ -258,15 +257,15 @@ static int at91rm9200_pcm_open(struct snd_pcm_substream *substream)
return ret;
}
static int at91rm9200_pcm_close(struct snd_pcm_substream *substream)
static int at91_pcm_close(struct snd_pcm_substream *substream)
{
struct at91rm9200_runtime_data *prtd = substream->runtime->private_data;
struct at91_runtime_data *prtd = substream->runtime->private_data;
kfree(prtd);
return 0;
}
static int at91rm9200_pcm_mmap(struct snd_pcm_substream *substream,
static int at91_pcm_mmap(struct snd_pcm_substream *substream,
struct vm_area_struct *vma)
{
struct snd_pcm_runtime *runtime = substream->runtime;
@ -277,24 +276,24 @@ static int at91rm9200_pcm_mmap(struct snd_pcm_substream *substream,
runtime->dma_bytes);
}
struct snd_pcm_ops at91rm9200_pcm_ops = {
.open = at91rm9200_pcm_open,
.close = at91rm9200_pcm_close,
struct snd_pcm_ops at91_pcm_ops = {
.open = at91_pcm_open,
.close = at91_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
.hw_params = at91rm9200_pcm_hw_params,
.hw_free = at91rm9200_pcm_hw_free,
.prepare = at91rm9200_pcm_prepare,
.trigger = at91rm9200_pcm_trigger,
.pointer = at91rm9200_pcm_pointer,
.mmap = at91rm9200_pcm_mmap,
.hw_params = at91_pcm_hw_params,
.hw_free = at91_pcm_hw_free,
.prepare = at91_pcm_prepare,
.trigger = at91_pcm_trigger,
.pointer = at91_pcm_pointer,
.mmap = at91_pcm_mmap,
};
static int at91rm9200_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
static int at91_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
int stream)
{
struct snd_pcm_substream *substream = pcm->streams[stream].substream;
struct snd_dma_buffer *buf = &substream->dma_buffer;
size_t size = at91rm9200_pcm_hardware.buffer_bytes_max;
size_t size = at91_pcm_hardware.buffer_bytes_max;
buf->dev.type = SNDRV_DMA_TYPE_DEV;
buf->dev.dev = pcm->card->dev;
@ -314,27 +313,27 @@ static int at91rm9200_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
return 0;
}
static u64 at91rm9200_pcm_dmamask = 0xffffffff;
static u64 at91_pcm_dmamask = 0xffffffff;
static int at91rm9200_pcm_new(struct snd_card *card,
static int at91_pcm_new(struct snd_card *card,
struct snd_soc_codec_dai *dai, struct snd_pcm *pcm)
{
int ret = 0;
if (!card->dev->dma_mask)
card->dev->dma_mask = &at91rm9200_pcm_dmamask;
card->dev->dma_mask = &at91_pcm_dmamask;
if (!card->dev->coherent_dma_mask)
card->dev->coherent_dma_mask = 0xffffffff;
if (dai->playback.channels_min) {
ret = at91rm9200_pcm_preallocate_dma_buffer(pcm,
ret = at91_pcm_preallocate_dma_buffer(pcm,
SNDRV_PCM_STREAM_PLAYBACK);
if (ret)
goto out;
}
if (dai->capture.channels_min) {
ret = at91rm9200_pcm_preallocate_dma_buffer(pcm,
ret = at91_pcm_preallocate_dma_buffer(pcm,
SNDRV_PCM_STREAM_CAPTURE);
if (ret)
goto out;
@ -343,7 +342,7 @@ static int at91rm9200_pcm_new(struct snd_card *card,
return ret;
}
static void at91rm9200_pcm_free_dma_buffers(struct snd_pcm *pcm)
static void at91_pcm_free_dma_buffers(struct snd_pcm *pcm)
{
struct snd_pcm_substream *substream;
struct snd_dma_buffer *buf;
@ -364,12 +363,12 @@ static void at91rm9200_pcm_free_dma_buffers(struct snd_pcm *pcm)
}
}
static int at91rm9200_pcm_suspend(struct platform_device *pdev,
static int at91_pcm_suspend(struct platform_device *pdev,
struct snd_soc_cpu_dai *dai)
{
struct snd_pcm_runtime *runtime = dai->runtime;
struct at91rm9200_runtime_data *prtd;
at91rm9200_pcm_dma_params_t *params;
struct at91_runtime_data *prtd;
struct at91_pcm_dma_params *params;
if (!runtime)
return 0;
@ -379,22 +378,22 @@ static int at91rm9200_pcm_suspend(struct platform_device *pdev,
/* disable the PDC and save the PDC registers */
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_disable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_disable);
prtd->pdc_xpr_save = at91_ssc_read(params->pdc->xpr);
prtd->pdc_xcr_save = at91_ssc_read(params->pdc->xcr);
prtd->pdc_xnpr_save = at91_ssc_read(params->pdc->xnpr);
prtd->pdc_xncr_save = at91_ssc_read(params->pdc->xncr);
prtd->pdc_xpr_save = at91_ssc_read(params->ssc_base + params->pdc->xpr);
prtd->pdc_xcr_save = at91_ssc_read(params->ssc_base + params->pdc->xcr);
prtd->pdc_xnpr_save = at91_ssc_read(params->ssc_base + params->pdc->xnpr);
prtd->pdc_xncr_save = at91_ssc_read(params->ssc_base + params->pdc->xncr);
return 0;
}
static int at91rm9200_pcm_resume(struct platform_device *pdev,
static int at91_pcm_resume(struct platform_device *pdev,
struct snd_soc_cpu_dai *dai)
{
struct snd_pcm_runtime *runtime = dai->runtime;
struct at91rm9200_runtime_data *prtd;
at91rm9200_pcm_dma_params_t *params;
struct at91_runtime_data *prtd;
struct at91_pcm_dma_params *params;
if (!runtime)
return 0;
@ -403,26 +402,26 @@ static int at91rm9200_pcm_resume(struct platform_device *pdev,
params = prtd->params;
/* restore the PDC registers and enable the PDC */
at91_ssc_write(params->pdc->xpr, prtd->pdc_xpr_save);
at91_ssc_write(params->pdc->xcr, prtd->pdc_xcr_save);
at91_ssc_write(params->pdc->xnpr, prtd->pdc_xnpr_save);
at91_ssc_write(params->pdc->xncr, prtd->pdc_xncr_save);
at91_ssc_write(params->ssc_base + params->pdc->xpr, prtd->pdc_xpr_save);
at91_ssc_write(params->ssc_base + params->pdc->xcr, prtd->pdc_xcr_save);
at91_ssc_write(params->ssc_base + params->pdc->xnpr, prtd->pdc_xnpr_save);
at91_ssc_write(params->ssc_base + params->pdc->xncr, prtd->pdc_xncr_save);
at91_ssc_write(params->pdc->ptcr, params->mask->pdc_enable);
at91_ssc_write(params->ssc_base + AT91_PDC_PTCR, params->mask->pdc_enable);
return 0;
}
struct snd_soc_platform at91rm9200_soc_platform = {
.name = "at91rm9200-audio",
.pcm_ops = &at91rm9200_pcm_ops,
.pcm_new = at91rm9200_pcm_new,
.pcm_free = at91rm9200_pcm_free_dma_buffers,
.suspend = at91rm9200_pcm_suspend,
.resume = at91rm9200_pcm_resume,
struct snd_soc_platform at91_soc_platform = {
.name = "at91-audio",
.pcm_ops = &at91_pcm_ops,
.pcm_new = at91_pcm_new,
.pcm_free = at91_pcm_free_dma_buffers,
.suspend = at91_pcm_suspend,
.resume = at91_pcm_resume,
};
EXPORT_SYMBOL_GPL(at91rm9200_soc_platform);
EXPORT_SYMBOL_GPL(at91_soc_platform);
MODULE_AUTHOR("Frank Mandarino <fmandarino@endrelia.com>");
MODULE_DESCRIPTION("Atmel AT91RM9200 PCM module");
MODULE_DESCRIPTION("Atmel AT91 PCM module");
MODULE_LICENSE("GPL");

54
sound/soc/at91/at91rm9200-pcm.h → sound/soc/at91/at91-pcm.h
View File

@ -1,5 +1,5 @@
/*
* at91rm9200-pcm.h - ALSA PCM interface for the Atmel AT91RM9200 chip
* at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC
*
* Author: Frank Mandarino <fmandarino@endrelia.com>
* Endrelia Technologies Inc.
@ -16,24 +16,26 @@
* published by the Free Software Foundation.
*/
#include <asm/arch/hardware.h>
struct at91_ssc_periph {
void __iomem *base;
u32 pid;
};
/*
* Registers and status bits that are required by the PCM driver.
*/
struct at91rm9200_ssc_regs {
void __iomem *cr; /* SSC control */
void __iomem *ier; /* SSC interrupt enable */
void __iomem *idr; /* SSC interrupt disable */
struct at91_pdc_regs {
unsigned int xpr; /* PDC recv/trans pointer */
unsigned int xcr; /* PDC recv/trans counter */
unsigned int xnpr; /* PDC next recv/trans pointer */
unsigned int xncr; /* PDC next recv/trans counter */
unsigned int ptcr; /* PDC transfer control */
};
struct at91rm9200_pdc_regs {
void __iomem *xpr; /* PDC recv/trans pointer */
void __iomem *xcr; /* PDC recv/trans counter */
void __iomem *xnpr; /* PDC next recv/trans pointer */
void __iomem *xncr; /* PDC next recv/trans counter */
void __iomem *ptcr; /* PDC transfer control */
};
struct at91rm9200_ssc_mask {
struct at91_ssc_mask {
u32 ssc_enable; /* SSC recv/trans enable */
u32 ssc_disable; /* SSC recv/trans disable */
u32 ssc_endx; /* SSC ENDTX or ENDRX */
@ -51,25 +53,19 @@ struct at91rm9200_ssc_mask {
* driver and called by the interface SSC interrupt handler if it is
* non-NULL.
*/
typedef struct {
struct at91_pcm_dma_params {
char *name; /* stream identifier */
int pdc_xfer_size; /* PDC counter increment in bytes */
struct at91rm9200_ssc_regs *ssc; /* SSC register addresses */
struct at91rm9200_pdc_regs *pdc; /* PDC receive/transmit registers */
struct at91rm9200_ssc_mask *mask;/* SSC & PDC status bits */
snd_pcm_substream_t *substream;
void (*dma_intr_handler)(u32, snd_pcm_substream_t *);
} at91rm9200_pcm_dma_params_t;
void __iomem *ssc_base; /* SSC base address */
struct at91_pdc_regs *pdc; /* PDC receive or transmit registers */
struct at91_ssc_mask *mask;/* SSC & PDC status bits */
struct snd_pcm_substream *substream;
void (*dma_intr_handler)(u32, struct snd_pcm_substream *);
};
extern struct snd_soc_cpu_dai at91rm9200_i2s_dai[3];
extern struct snd_soc_platform at91rm9200_soc_platform;
extern struct snd_soc_cpu_dai at91_i2s_dai[3];
extern struct snd_soc_platform at91_soc_platform;
/*
* SSC I/O helpers.
* E.g., at91_ssc_write(AT91_SSC(1) + AT91_SSC_CR, AT91_SSC_RXEN);
*/
#define AT91_SSC(x) (((x)==0) ? AT91_VA_BASE_SSC0 :\
((x)==1) ? AT91_VA_BASE_SSC1 : ((x)==2) ? AT91_VA_BASE_SSC2 : NULL)
#define at91_ssc_read(a) ((unsigned long) __raw_readl(a))
#define at91_ssc_write(a,v) __raw_writel((v),(a))

64
sound/soc/at91/eti_b1_wm8731.c
View File

@ -1,5 +1,5 @@
/*
* eti_b1_wm8731 -- SoC audio for Endrelia ETI_B1.
* eti_b1_wm8731 -- SoC audio for AT91RM9200-based Endrelia ETI_B1 board.
*
* Author: Frank Mandarino <fmandarino@endrelia.com>
* Endrelia Technologies Inc.
@ -37,12 +37,12 @@
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <asm/arch/at91rm9200.h>
#include <asm/arch/gpio.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/gpio.h>
#include "../codecs/wm8731.h"
#include "at91rm9200-pcm.h"
#include "at91-pcm.h"
#if 0
#define DBG(x...) printk(KERN_INFO "eti_b1_wm8731:" x)
@ -50,10 +50,18 @@
#define DBG(x...)
#endif
#define AT91_PIO_TF1 (1 << (AT91_PIN_PB6 - PIN_BASE) % 32)
#define AT91_PIO_TK1 (1 << (AT91_PIN_PB7 - PIN_BASE) % 32)
#define AT91_PIO_TD1 (1 << (AT91_PIN_PB8 - PIN_BASE) % 32)
#define AT91_PIO_RD1 (1 << (AT91_PIN_PB9 - PIN_BASE) % 32)
#define AT91_PIO_RK1 (1 << (AT91_PIN_PB10 - PIN_BASE) % 32)
#define AT91_PIO_RF1 (1 << (AT91_PIN_PB11 - PIN_BASE) % 32)
static struct clk *pck1_clk;
static struct clk *pllb_clk;
static int eti_b1_startup(snd_pcm_substream_t *substream)
static int eti_b1_startup(struct snd_pcm_substream *substream)
{
/* Start PCK1 clock. */
clk_enable(pck1_clk);
@ -62,7 +70,7 @@ static int eti_b1_startup(snd_pcm_substream_t *substream)
return 0;
}
static void eti_b1_shutdown(snd_pcm_substream_t *substream)
static void eti_b1_shutdown(struct snd_pcm_substream *substream)
{
/* Stop PCK1 clock. */
clk_disable(pck1_clk);
@ -138,7 +146,7 @@ unsigned int eti_b1_config_sysclk(struct snd_soc_pcm_runtime *rtd,
static struct snd_soc_dai_link eti_b1_dai = {
.name = "WM8731",
.stream_name = "WM8731",
.cpu_dai = &at91rm9200_i2s_dai[1],
.cpu_dai = &at91_i2s_dai[1],
.codec_dai = &wm8731_dai,
.init = eti_b1_wm8731_init,
.config_sysclk = eti_b1_config_sysclk,
@ -157,7 +165,7 @@ static struct wm8731_setup_data eti_b1_wm8731_setup = {
static struct snd_soc_device eti_b1_snd_devdata = {
.machine = &snd_soc_machine_eti_b1,
.platform = &at91rm9200_soc_platform,
.platform = &at91_soc_platform,
.codec_dev = &soc_codec_dev_wm8731,
.codec_data = &eti_b1_wm8731_setup,
};
@ -168,22 +176,41 @@ static int __init eti_b1_init(void)
{
int ret;
u32 ssc_pio_lines;
struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) {
DBG("SSC1 memory region is busy\n");
return -EBUSY;
}
ssc->base = ioremap(AT91RM9200_BASE_SSC1, SZ_16K);
if (!ssc->base) {
DBG("SSC1 memory ioremap failed\n");
ret = -ENOMEM;
goto fail_release_mem;
}
ssc->pid = AT91RM9200_ID_SSC1;
eti_b1_snd_device = platform_device_alloc("soc-audio", -1);
if (!eti_b1_snd_device)
return -ENOMEM;
if (!eti_b1_snd_device) {
DBG("platform device allocation failed\n");
ret = -ENOMEM;
goto fail_io_unmap;
}
platform_set_drvdata(eti_b1_snd_device, &eti_b1_snd_devdata);
eti_b1_snd_devdata.dev = &eti_b1_snd_device->dev;
ret = platform_device_add(eti_b1_snd_device);
if (ret) {
DBG("platform device add failed\n");
platform_device_put(eti_b1_snd_device);
return ret;
goto fail_io_unmap;
}
ssc_pio_lines = AT91_PB6_TF1 | AT91_PB7_TK1 | AT91_PB8_TD1
| AT91_PB9_RD1 /* | AT91_PB10_RK1 | AT91_PB11_RF1 */;
ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1
| AT91_PIO_RD1 /* | AT91_PIO_RK1 | AT91_PIO_RF1 */;
/* Reset all PIO registers and assign lines to peripheral A */
at91_sys_write(AT91_PIOB + PIO_PDR, ssc_pio_lines);
@ -211,14 +238,25 @@ static int __init eti_b1_init(void)
at91_set_B_periph(AT91_PIN_PA24, 0);
return ret;
fail_io_unmap:
iounmap(ssc->base);
fail_release_mem:
release_mem_region(AT91RM9200_BASE_SSC1, SZ_16K);
return ret;
}
static void __exit eti_b1_exit(void)
{
struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
clk_put(pck1_clk);
clk_put(pllb_clk);
platform_device_unregister(eti_b1_snd_device);
iounmap(ssc->base);
release_mem_region(AT91RM9200_BASE_SSC1, SZ_16K);
}
module_init(eti_b1_init);