[ARM] S3C24XX: GPIO: Remove pin specific input and output defines

The use of S3C2410_GP[A-Z]x_INP and S3C2410_GP[A-Z]x_OUTP are
very rare and are taking up large amounts of space in the
regs-gpio.h header.

The GPIO layer has had generic input and out defines called
S3C2410_GPIO_INPUT and S3C2410_GPIO_OUTPUT for a while which work
for all S3C24XX GPIOs.

Do the following replacements:

   S3C2410_GP[A-Z][0-9]*_\OUTP => S3C2410_GPIO_OUTPUT
   S3C2410_GP[A-Z][0-9]*_\INP  => /S3C2410_GPIO_INPUT
   S3C2410_GPA[0-9]*_OUT       => S3C2410_GPIO_OUTPUT

to remove any usages of these and prepare the header for
the removal of these.

The following command was used to acheive this:

find . -type f -writable ! -name regs-gpio.h ! -name "*~" | xargs sed -i~ -e 's/S3C2410_GP[A-Z][0-9]*_\OUTP/S3C2410_GPIO_OUTPUT/g' -e 's/S3C2410_GP[A-Z][0-9]*_\INP/S3C2410_GPIO_INPUT/g' -e 's/S3C2410_GPA[0-9]*_OUT/S3C2410_GPIO_OUTPUT/g'

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Ben Dooks 2009-05-13 21:46:15 +01:00
parent ec7f4d5d67
commit 9f05f6a921
8 changed files with 14 additions and 14 deletions

View File

@ -89,7 +89,7 @@ static int __init h1940bt_probe(struct platform_device *pdev)
/* Configures BT serial port GPIOs */
s3c2410_gpio_cfgpin(S3C2410_GPH0, S3C2410_GPH0_nCTS0);
s3c2410_gpio_pullup(S3C2410_GPH0, 1);
s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_pullup(S3C2410_GPH1, 1);
s3c2410_gpio_cfgpin(S3C2410_GPH2, S3C2410_GPH2_TXD0);
s3c2410_gpio_pullup(S3C2410_GPH2, 1);

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@ -224,7 +224,7 @@ static void amlm5900_init_pm(void)
} else {
enable_irq_wake(IRQ_EINT9);
/* configure the suspend/resume status pin */
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_pullup(S3C2410_GPF2, 0);
}
}

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@ -213,7 +213,7 @@ static int bast_pm_suspend(struct sys_device *sd, pm_message_t state)
{
/* ensure that an nRESET is not generated on resume. */
s3c2410_gpio_setpin(S3C2410_GPA21, 1);
s3c2410_gpio_cfgpin(S3C2410_GPA21, S3C2410_GPA21_OUT);
s3c2410_gpio_cfgpin(S3C2410_GPA21, S3C2410_GPIO_OUTPUT);
return 0;
}

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@ -355,7 +355,7 @@ static struct clk *vr1000_clocks[] __initdata = {
static void vr1000_power_off(void)
{
s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_setpin(S3C2410_GPB9, 1);
}

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@ -109,7 +109,7 @@ int usb_simtec_init(void)
printk("USB Power Control, (c) 2004 Simtec Electronics\n");
s3c_device_usb.dev.platform_data = &usb_simtec_info;
s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPB4_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPB4, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_setpin(S3C2410_GPB4, 1);
return 0;
}

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@ -121,15 +121,15 @@ static void __init nexcoder_sensorboard_init(void)
{
// Initialize SCCB bus
s3c2410_gpio_setpin(S3C2410_GPE14, 1); // IICSCL
s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_setpin(S3C2410_GPE15, 1); // IICSDA
s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPIO_OUTPUT);
// Power up the sensor board
s3c2410_gpio_setpin(S3C2410_GPF1, 1);
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPF1_OUTP); // CAM_GPIO7 => nLDO_PWRDN
s3c2410_gpio_cfgpin(S3C2410_GPF1, S3C2410_GPIO_OUTPUT); // CAM_GPIO7 => nLDO_PWRDN
s3c2410_gpio_setpin(S3C2410_GPF2, 0);
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_OUTP); // CAM_GPIO6 => CAM_PWRDN
s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPIO_OUTPUT); // CAM_GPIO6 => CAM_PWRDN
}
static void __init nexcoder_map_io(void)

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@ -292,7 +292,7 @@ static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
/* ensure that an nRESET is not generated on resume. */
s3c2410_gpio_setpin(S3C2410_GPA21, 1);
s3c2410_gpio_cfgpin(S3C2410_GPA21, S3C2410_GPA21_OUT);
s3c2410_gpio_cfgpin(S3C2410_GPA21, S3C2410_GPIO_OUTPUT);
return 0;
}

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@ -184,10 +184,10 @@ void __init smdk_machine_init(void)
{
/* Configure the LEDs (even if we have no LED support)*/
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_OUTP);
s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPIO_OUTPUT);
s3c2410_gpio_setpin(S3C2410_GPF4, 1);
s3c2410_gpio_setpin(S3C2410_GPF5, 1);