OMAP3: clock: Camera module doesn't have IDLEST bit
This patch avoids waiting for the camera module to become ready, since it doesn't have IDLEST bit. Based on a earlier hack done by Paul Walmsley on Sep 9 2008 on linux-omap tree. Signed-off-by: Sergio Aguirre <saaguirre@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -2052,7 +2052,7 @@ static struct clk dss_ick = {
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static struct clk cam_mclk = {
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.name = "cam_mclk",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &dpll4_m5x2_ck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_CAM_SHIFT,
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@ -2063,7 +2063,7 @@ static struct clk cam_mclk = {
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static struct clk cam_ick = {
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/* Handles both L3 and L4 clocks */
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.name = "cam_ick",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &l4_ick,
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.init = &omap2_init_clk_clkdm,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
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@ -2074,7 +2074,7 @@ static struct clk cam_ick = {
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static struct clk csi2_96m_fck = {
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.name = "csi2_96m_fck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &core_96m_fck,
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.init = &omap2_init_clk_clkdm,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
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