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MIPS: ath91: Remove pointless irqdisable/enable 

The various interrupt flow handlers in ath79 are cascading interrupt
handlers. They all have a disable_irq_nosync()/enable_irq() pair
around the generic_handle_irq() call. The value of this disable/enable
is zero because its a complete noop:

disable_irq_nosync() merily increments the disable count without
actually masking the interrupt. enable_irq() soleley decrements the
disable count without touching the interrupt chip. The interrupt
cannot arrive again because the complete call chain runs with
interrupts disabled.

Remove it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Patchwork: https://patchwork.linux-mips.org/patch/10703/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Thomas Gleixner 2015-07-13 20:46:06 +00:00 committed by Ralf Baechle
parent e0288a0a7b
commit 9d9a2fa7dc
1 changed files with 2 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/mips/ath79/irq.c
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@ -123,8 +123,6 @@ static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
{ {
u32 status; u32 status;
disable_irq_nosync(irq);
status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS); status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);
if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) { if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) {
@ -136,8 +134,6 @@ static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
} else { } else {
spurious_interrupt(); spurious_interrupt();
} }
enable_irq(irq);
} }
static void ar934x_ip2_irq_init(void) static void ar934x_ip2_irq_init(void)
@ -156,14 +152,12 @@ static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
{ {
u32 status; u32 status;
disable_irq_nosync(irq);
status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL; status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL;
if (status == 0) { if (status == 0) {
spurious_interrupt(); spurious_interrupt();
goto enable; return;
} }
if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) { if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) {
@ -175,17 +169,12 @@ static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
/* TODO: flush DDR? */ /* TODO: flush DDR? */
generic_handle_irq(ATH79_IP2_IRQ(1)); generic_handle_irq(ATH79_IP2_IRQ(1));
} }
enable:
enable_irq(irq);
} }
static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc) static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
{ {
u32 status; u32 status;
disable_irq_nosync(irq);
status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
status &= QCA955X_EXT_INT_PCIE_RC2_ALL | status &= QCA955X_EXT_INT_PCIE_RC2_ALL |
QCA955X_EXT_INT_USB1 | QCA955X_EXT_INT_USB1 |
@ -193,7 +182,7 @@ static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
if (status == 0) { if (status == 0) {
spurious_interrupt(); spurious_interrupt();
goto enable; return;
} }
if (status & QCA955X_EXT_INT_USB1) { if (status & QCA955X_EXT_INT_USB1) {
@ -210,9 +199,6 @@ static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
/* TODO: flush DDR? */ /* TODO: flush DDR? */
generic_handle_irq(ATH79_IP3_IRQ(2)); generic_handle_irq(ATH79_IP3_IRQ(2));
} }
enable:
enable_irq(irq);
} }
static void qca955x_irq_init(void) static void qca955x_irq_init(void)