The i.MX SoC updates for 4.5:
- Select HAVE_IMX_SRC for i.MX7 to avoid a randconfig build error - Enable cpufreq support on i.MX7D - A couple of random cleanup on iomux-imx31 and mach-imx6ul -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJWeVfeAAoJEFBXWFqHsHzOOmcH/A3mzA0g2FLMZIbJNY5tqrap z1aejsrdkL00vJWGcI0FJt7G1JkYUFYPjjDnbkbeYnXwfi66ZafWdHeSy5QIFfFv lbbF5Na9FESO5A+iWtvpScS/Frz1kk8Uq4SDiglzq+pV9MmQH7Ik3bbk57/h2sGA Uk+SntoiEPmU0d/Jp0pnA66g6FYdDXhl6Ie1fBZSsToCDVvG/dD2O37NrhehzH1A htxcPjuEfmYJRju3T2zgpTdgQ/vchMoCDH2hndi52LVz2LF6RRvoNvhm/qPM4Pg9 OlifVrFa8LMBSV9az7Fu9w0GYyKkHdE5ECxXWJvCi0w+p1zGb3rWf3Aj6aR4kag= =Gsgx -----END PGP SIGNATURE----- Merge tag 'imx-soc-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc The i.MX SoC updates for 4.5: - Select HAVE_IMX_SRC for i.MX7 to avoid a randconfig build error - Enable cpufreq support on i.MX7D - A couple of random cleanup on iomux-imx31 and mach-imx6ul * tag 'imx-soc-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: select SRC for i.MX7 ARM: mach-imx: iomux-imx31: fix spelling mistake in error message ARM: imx: enable cpufreq device on i.mx7d mach-imx/mach-imx6ul.c: proper constness with __initconst Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
9d67d4624f
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@ -563,6 +563,7 @@ config SOC_IMX7D
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select ARM_GIC
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select ARM_GIC
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select HAVE_IMX_ANATOP
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select HAVE_IMX_ANATOP
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select HAVE_IMX_MMDC
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select HAVE_IMX_MMDC
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select HAVE_IMX_SRC
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help
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help
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This enables support for Freescale i.MX7 Dual processor.
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This enables support for Freescale i.MX7 Dual processor.
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@ -100,7 +100,7 @@ int mxc_iomux_alloc_pin(unsigned int pin, const char *label)
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unsigned pad = pin & IOMUX_PADNUM_MASK;
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unsigned pad = pin & IOMUX_PADNUM_MASK;
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if (pad >= (PIN_MAX + 1)) {
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if (pad >= (PIN_MAX + 1)) {
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printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n",
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printk(KERN_ERR "mxc_iomux: Attempt to request nonexistent pin %u for \"%s\"\n",
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pad, label ? label : "?");
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pad, label ? label : "?");
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -84,7 +84,7 @@ static void __init imx6ul_init_late(void)
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platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
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platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
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}
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}
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static const char *imx6ul_dt_compat[] __initconst = {
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static const char * const imx6ul_dt_compat[] __initconst = {
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"fsl,imx6ul",
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"fsl,imx6ul",
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NULL,
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NULL,
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};
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};
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@ -105,6 +105,11 @@ static void __init imx7d_init_irq(void)
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irqchip_init();
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irqchip_init();
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}
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}
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static void __init imx7d_init_late(void)
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{
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platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
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}
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static const char *const imx7d_dt_compat[] __initconst = {
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static const char *const imx7d_dt_compat[] __initconst = {
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"fsl,imx7d",
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"fsl,imx7d",
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NULL,
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NULL,
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@ -112,6 +117,7 @@ static const char *const imx7d_dt_compat[] __initconst = {
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DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")
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DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")
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.init_irq = imx7d_init_irq,
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.init_irq = imx7d_init_irq,
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.init_late = imx7d_init_late,
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.init_machine = imx7d_init_machine,
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.init_machine = imx7d_init_machine,
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.dt_compat = imx7d_dt_compat,
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.dt_compat = imx7d_dt_compat,
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MACHINE_END
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MACHINE_END
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