powerpc: Split ICSWX ACOP and PID processing
Some processors, like embedded, that already have a PID register that is managed by the system. This patch separates the ACOP and PID processing into separate files so that the ACOP code can be shared. Signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Jimi Xenidis
Benjamin Herrenschmidt
parent
5182a131dd
commit
9d67028090
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@ -21,6 +21,8 @@ obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o
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obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \
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tlb_hash$(CONFIG_WORD_SIZE).o \
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mmu_context_hash$(CONFIG_WORD_SIZE).o
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obj-$(CONFIG_PPC_ICSWX) += icswx.o
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obj-$(CONFIG_PPC_ICSWX_PID) += icswx_pid.o
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obj-$(CONFIG_40x) += 40x_mmu.o
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obj-$(CONFIG_44x) += 44x_mmu.o
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obj-$(CONFIG_PPC_FSL_BOOK3E) += fsl_booke_mmu.o
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@ -0,0 +1,160 @@
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/*
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* ICSWX and ACOP Management
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*
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* Copyright (C) 2011 Anton Blanchard, IBM Corp. <anton@samba.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/spinlock.h>
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#include <linux/module.h>
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#include "icswx.h"
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/*
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* The processor and its L2 cache cause the icswx instruction to
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* generate a COP_REQ transaction on PowerBus. The transaction has no
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* address, and the processor does not perform an MMU access to
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* authenticate the transaction. The command portion of the PowerBus
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* COP_REQ transaction includes the LPAR_ID (LPID) and the coprocessor
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* Process ID (PID), which the coprocessor compares to the authorized
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* LPID and PID held in the coprocessor, to determine if the process
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* is authorized to generate the transaction. The data of the COP_REQ
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* transaction is 128-byte or less in size and is placed in cacheable
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* memory on a 128-byte cache line boundary.
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*
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* The task to use a coprocessor should use use_cop() to mark the use
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* of the Coprocessor Type (CT) and context switching. On a server
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* class processor, the PID register is used only for coprocessor
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* management + * and so a coprocessor PID is allocated before
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* executing icswx + * instruction. Drop_cop() is used to free the
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* coprocessor PID.
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*
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* Example:
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* Host Fabric Interface (HFI) is a PowerPC network coprocessor.
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* Each HFI have multiple windows. Each HFI window serves as a
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* network device sending to and receiving from HFI network.
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* HFI immediate send function uses icswx instruction. The immediate
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* send function allows small (single cache-line) packets be sent
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* without using the regular HFI send FIFO and doorbell, which are
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* much slower than immediate send.
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*
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* For each task intending to use HFI immediate send, the HFI driver
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* calls use_cop() to obtain a coprocessor PID for the task.
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* The HFI driver then allocate a free HFI window and save the
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* coprocessor PID to the HFI window to allow the task to use the
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* HFI window.
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*
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* The HFI driver repeatedly creates immediate send packets and
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* issues icswx instruction to send data through the HFI window.
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* The HFI compares the coprocessor PID in the CPU PID register
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* to the PID held in the HFI window to determine if the transaction
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* is allowed.
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*
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* When the task to release the HFI window, the HFI driver calls
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* drop_cop() to release the coprocessor PID.
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*/
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void switch_cop(struct mm_struct *next)
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{
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#ifdef CONFIG_ICSWX_PID
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mtspr(SPRN_PID, next->context.cop_pid);
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#endif
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mtspr(SPRN_ACOP, next->context.acop);
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}
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/**
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* Start using a coprocessor.
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* @acop: mask of coprocessor to be used.
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* @mm: The mm the coprocessor to associate with. Most likely current mm.
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*
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* Return a positive PID if successful. Negative errno otherwise.
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* The returned PID will be fed to the coprocessor to determine if an
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* icswx transaction is authenticated.
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*/
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int use_cop(unsigned long acop, struct mm_struct *mm)
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{
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int ret;
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if (!cpu_has_feature(CPU_FTR_ICSWX))
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return -ENODEV;
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if (!mm || !acop)
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return -EINVAL;
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/* The page_table_lock ensures mm_users won't change under us */
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spin_lock(&mm->page_table_lock);
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spin_lock(mm->context.cop_lockp);
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ret = get_cop_pid(mm);
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if (ret < 0)
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goto out;
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/* update acop */
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mm->context.acop |= acop;
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sync_cop(mm);
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/*
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* If this is a threaded process then there might be other threads
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* running. We need to send an IPI to force them to pick up any
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* change in PID and ACOP.
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*/
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if (atomic_read(&mm->mm_users) > 1)
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smp_call_function(sync_cop, mm, 1);
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out:
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spin_unlock(mm->context.cop_lockp);
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spin_unlock(&mm->page_table_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(use_cop);
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/**
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* Stop using a coprocessor.
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* @acop: mask of coprocessor to be stopped.
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* @mm: The mm the coprocessor associated with.
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*/
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void drop_cop(unsigned long acop, struct mm_struct *mm)
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{
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int free_pid;
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if (!cpu_has_feature(CPU_FTR_ICSWX))
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return;
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if (WARN_ON_ONCE(!mm))
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return;
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/* The page_table_lock ensures mm_users won't change under us */
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spin_lock(&mm->page_table_lock);
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spin_lock(mm->context.cop_lockp);
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mm->context.acop &= ~acop;
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free_pid = disable_cop_pid(mm);
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sync_cop(mm);
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/*
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* If this is a threaded process then there might be other threads
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* running. We need to send an IPI to force them to pick up any
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* change in PID and ACOP.
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*/
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if (atomic_read(&mm->mm_users) > 1)
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smp_call_function(sync_cop, mm, 1);
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if (free_pid != COP_PID_NONE)
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free_cop_pid(free_pid);
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spin_unlock(mm->context.cop_lockp);
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spin_unlock(&mm->page_table_lock);
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}
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EXPORT_SYMBOL_GPL(drop_cop);
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@ -0,0 +1,39 @@
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#ifndef _ARCH_POWERPC_MM_ICSWX_H_
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#define _ARCH_POWERPC_MM_ICSWX_H_
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/*
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* ICSWX and ACOP Management
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*
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* Copyright (C) 2011 Anton Blanchard, IBM Corp. <anton@samba.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <asm/mmu_context.h>
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/* also used to denote that PIDs are not used */
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#define COP_PID_NONE 0
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static inline void sync_cop(void *arg)
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{
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struct mm_struct *mm = arg;
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if (mm == current->active_mm)
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switch_cop(current->active_mm);
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}
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#ifdef CONFIG_PPC_ICSWX_PID
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extern int get_cop_pid(struct mm_struct *mm);
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extern int disable_cop_pid(struct mm_struct *mm);
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extern void free_cop_pid(int free_pid);
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#else
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#define get_cop_pid(m) (COP_PID_NONE)
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#define disable_cop_pid(m) (COP_PID_NONE)
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#define free_cop_pid(p)
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#endif
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#endif /* !_ARCH_POWERPC_MM_ICSWX_H_ */
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@ -0,0 +1,87 @@
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/*
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* ICSWX and ACOP/PID Management
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*
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* Copyright (C) 2011 Anton Blanchard, IBM Corp. <anton@samba.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/spinlock.h>
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#include <linux/idr.h>
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#include <linux/module.h>
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#include "icswx.h"
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#define COP_PID_MIN (COP_PID_NONE + 1)
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#define COP_PID_MAX (0xFFFF)
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static DEFINE_SPINLOCK(mmu_context_acop_lock);
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static DEFINE_IDA(cop_ida);
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static int new_cop_pid(struct ida *ida, int min_id, int max_id,
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spinlock_t *lock)
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{
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int index;
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int err;
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again:
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if (!ida_pre_get(ida, GFP_KERNEL))
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return -ENOMEM;
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spin_lock(lock);
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err = ida_get_new_above(ida, min_id, &index);
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spin_unlock(lock);
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if (err == -EAGAIN)
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goto again;
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else if (err)
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return err;
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if (index > max_id) {
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spin_lock(lock);
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ida_remove(ida, index);
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spin_unlock(lock);
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return -ENOMEM;
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}
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return index;
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}
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int get_cop_pid(struct mm_struct *mm)
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{
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int pid;
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if (mm->context.cop_pid == COP_PID_NONE) {
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pid = new_cop_pid(&cop_ida, COP_PID_MIN, COP_PID_MAX,
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&mmu_context_acop_lock);
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if (pid >= 0)
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mm->context.cop_pid = pid;
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}
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return mm->context.cop_pid;
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}
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int disable_cop_pid(struct mm_struct *mm)
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{
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int free_pid = COP_PID_NONE;
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if ((!mm->context.acop) && (mm->context.cop_pid != COP_PID_NONE)) {
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free_pid = mm->context.cop_pid;
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mm->context.cop_pid = COP_PID_NONE;
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}
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return free_pid;
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}
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void free_cop_pid(int free_pid)
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{
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spin_lock(&mmu_context_acop_lock);
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ida_remove(&cop_ida, free_pid);
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spin_unlock(&mmu_context_acop_lock);
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}
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@ -24,200 +24,7 @@
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#include <asm/mmu_context.h>
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#ifdef CONFIG_PPC_ICSWX
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/*
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* The processor and its L2 cache cause the icswx instruction to
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* generate a COP_REQ transaction on PowerBus. The transaction has
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* no address, and the processor does not perform an MMU access
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* to authenticate the transaction. The command portion of the
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* PowerBus COP_REQ transaction includes the LPAR_ID (LPID) and
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* the coprocessor Process ID (PID), which the coprocessor compares
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* to the authorized LPID and PID held in the coprocessor, to determine
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* if the process is authorized to generate the transaction.
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* The data of the COP_REQ transaction is 128-byte or less and is
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* placed in cacheable memory on a 128-byte cache line boundary.
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*
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* The task to use a coprocessor should use use_cop() to allocate
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* a coprocessor PID before executing icswx instruction. use_cop()
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* also enables the coprocessor context switching. Drop_cop() is
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* used to free the coprocessor PID.
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*
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* Example:
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* Host Fabric Interface (HFI) is a PowerPC network coprocessor.
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* Each HFI have multiple windows. Each HFI window serves as a
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* network device sending to and receiving from HFI network.
|
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* HFI immediate send function uses icswx instruction. The immediate
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* send function allows small (single cache-line) packets be sent
|
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* without using the regular HFI send FIFO and doorbell, which are
|
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* much slower than immediate send.
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*
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* For each task intending to use HFI immediate send, the HFI driver
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* calls use_cop() to obtain a coprocessor PID for the task.
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* The HFI driver then allocate a free HFI window and save the
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* coprocessor PID to the HFI window to allow the task to use the
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* HFI window.
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*
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* The HFI driver repeatedly creates immediate send packets and
|
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* issues icswx instruction to send data through the HFI window.
|
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* The HFI compares the coprocessor PID in the CPU PID register
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* to the PID held in the HFI window to determine if the transaction
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* is allowed.
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*
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* When the task to release the HFI window, the HFI driver calls
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* drop_cop() to release the coprocessor PID.
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*/
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#define COP_PID_NONE 0
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#define COP_PID_MIN (COP_PID_NONE + 1)
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#define COP_PID_MAX (0xFFFF)
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static DEFINE_SPINLOCK(mmu_context_acop_lock);
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static DEFINE_IDA(cop_ida);
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void switch_cop(struct mm_struct *next)
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{
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mtspr(SPRN_PID, next->context.cop_pid);
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mtspr(SPRN_ACOP, next->context.acop);
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}
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static int new_cop_pid(struct ida *ida, int min_id, int max_id,
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spinlock_t *lock)
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{
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int index;
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int err;
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again:
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if (!ida_pre_get(ida, GFP_KERNEL))
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return -ENOMEM;
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spin_lock(lock);
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err = ida_get_new_above(ida, min_id, &index);
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spin_unlock(lock);
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if (err == -EAGAIN)
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goto again;
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else if (err)
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return err;
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if (index > max_id) {
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spin_lock(lock);
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ida_remove(ida, index);
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spin_unlock(lock);
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return -ENOMEM;
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}
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return index;
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}
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static void sync_cop(void *arg)
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{
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struct mm_struct *mm = arg;
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if (mm == current->active_mm)
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switch_cop(current->active_mm);
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}
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/**
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* Start using a coprocessor.
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* @acop: mask of coprocessor to be used.
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* @mm: The mm the coprocessor to associate with. Most likely current mm.
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*
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* Return a positive PID if successful. Negative errno otherwise.
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* The returned PID will be fed to the coprocessor to determine if an
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* icswx transaction is authenticated.
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*/
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int use_cop(unsigned long acop, struct mm_struct *mm)
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{
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int ret;
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if (!cpu_has_feature(CPU_FTR_ICSWX))
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return -ENODEV;
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if (!mm || !acop)
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return -EINVAL;
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/* The page_table_lock ensures mm_users won't change under us */
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spin_lock(&mm->page_table_lock);
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spin_lock(mm->context.cop_lockp);
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if (mm->context.cop_pid == COP_PID_NONE) {
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ret = new_cop_pid(&cop_ida, COP_PID_MIN, COP_PID_MAX,
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&mmu_context_acop_lock);
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if (ret < 0)
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goto out;
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mm->context.cop_pid = ret;
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}
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mm->context.acop |= acop;
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sync_cop(mm);
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/*
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* If this is a threaded process then there might be other threads
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* running. We need to send an IPI to force them to pick up any
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* change in PID and ACOP.
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*/
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if (atomic_read(&mm->mm_users) > 1)
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smp_call_function(sync_cop, mm, 1);
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ret = mm->context.cop_pid;
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out:
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spin_unlock(mm->context.cop_lockp);
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spin_unlock(&mm->page_table_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(use_cop);
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/**
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* Stop using a coprocessor.
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* @acop: mask of coprocessor to be stopped.
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* @mm: The mm the coprocessor associated with.
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*/
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void drop_cop(unsigned long acop, struct mm_struct *mm)
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{
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int free_pid = COP_PID_NONE;
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if (!cpu_has_feature(CPU_FTR_ICSWX))
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return;
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if (WARN_ON_ONCE(!mm))
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return;
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/* The page_table_lock ensures mm_users won't change under us */
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spin_lock(&mm->page_table_lock);
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spin_lock(mm->context.cop_lockp);
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mm->context.acop &= ~acop;
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|
||||
if ((!mm->context.acop) && (mm->context.cop_pid != COP_PID_NONE)) {
|
||||
free_pid = mm->context.cop_pid;
|
||||
mm->context.cop_pid = COP_PID_NONE;
|
||||
}
|
||||
|
||||
sync_cop(mm);
|
||||
|
||||
/*
|
||||
* If this is a threaded process then there might be other threads
|
||||
* running. We need to send an IPI to force them to pick up any
|
||||
* change in PID and ACOP.
|
||||
*/
|
||||
if (atomic_read(&mm->mm_users) > 1)
|
||||
smp_call_function(sync_cop, mm, 1);
|
||||
|
||||
if (free_pid != COP_PID_NONE) {
|
||||
spin_lock(&mmu_context_acop_lock);
|
||||
ida_remove(&cop_ida, free_pid);
|
||||
spin_unlock(&mmu_context_acop_lock);
|
||||
}
|
||||
|
||||
spin_unlock(mm->context.cop_lockp);
|
||||
spin_unlock(&mm->page_table_lock);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(drop_cop);
|
||||
|
||||
#endif /* CONFIG_PPC_ICSWX */
|
||||
#include "icswx.h"
|
||||
|
||||
static DEFINE_SPINLOCK(mmu_context_lock);
|
||||
static DEFINE_IDA(mmu_context_ida);
|
||||
|
|
|
|||
|
|
@ -252,6 +252,14 @@ config PPC_ICSWX
|
|||
|
||||
If in doubt, say N here.
|
||||
|
||||
config PPC_ICSWX_PID
|
||||
bool "icswx requires direct PID management"
|
||||
depends on PPC_ICSWX && POWER4
|
||||
default y
|
||||
---help---
|
||||
PID register in server is used explicitly for ICSWX. In
|
||||
embedded systems PID managment is done by the system.
|
||||
|
||||
config SPE
|
||||
bool "SPE Support"
|
||||
depends on E200 || (E500 && !PPC_E500MC)
|
||||
|
|
|
|||
Loading…
Reference in New Issue