r8169: more magic during initialization of the hardware
Mostly taken from Realtek's driver. It's a bit yucky but the original is even worse. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Signed-off-by: Darren Salt <linux@youmustbejoking.demon.co.uk>
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@ -1815,12 +1815,25 @@ static void rtl8169_hw_reset(void __iomem *ioaddr)
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RTL_R8(ChipCmd);
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}
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static void
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rtl8169_hw_start(struct net_device *dev)
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static void rtl8169_set_rx_tx_config_registers(struct rtl8169_private *tp)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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u32 cfg = rtl8169_rx_config;
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cfg |= (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
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RTL_W32(RxConfig, cfg);
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/* Set DMA burst size and Interframe Gap Time */
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RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
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(InterFrameGap << TxInterFrameGapShift));
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}
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static void rtl8169_hw_start(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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void __iomem *ioaddr = tp->mmio_addr;
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struct pci_dev *pdev = tp->pci_dev;
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u16 cmd;
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u32 i;
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/* Soft reset the chip. */
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@ -1833,6 +1846,11 @@ rtl8169_hw_start(struct net_device *dev)
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msleep_interruptible(1);
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}
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if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
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RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);
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pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08);
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}
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if (tp->mac_version == RTL_GIGA_MAC_VER_13) {
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pci_write_config_word(pdev, 0x68, 0x00);
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pci_write_config_word(pdev, 0x69, 0x08);
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@ -1840,8 +1858,6 @@ rtl8169_hw_start(struct net_device *dev)
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/* Undocumented stuff. */
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if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
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u16 cmd;
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/* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
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if ((RTL_R8(Config2) & 0x07) & 0x01)
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RTL_W32(0x7c, 0x0007ffff);
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@ -1853,23 +1869,29 @@ rtl8169_hw_start(struct net_device *dev)
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pci_write_config_word(pdev, PCI_COMMAND, cmd);
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}
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RTL_W8(Cfg9346, Cfg9346_Unlock);
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if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_02) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_03) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_04))
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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RTL_W8(EarlyTxThres, EarlyTxThld);
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/* Low hurts. Let's disable the filtering. */
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RTL_W16(RxMaxSize, 16383);
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/* Set Rx Config register */
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i = rtl8169_rx_config |
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(RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
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RTL_W32(RxConfig, i);
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if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_02) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_03) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_04))
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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rtl8169_set_rx_tx_config_registers(tp);
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/* Set DMA burst size and Interframe Gap Time */
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RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
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(InterFrameGap << TxInterFrameGapShift));
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cmd = RTL_R16(CPlusCmd);
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RTL_W16(CPlusCmd, cmd);
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tp->cp_cmd |= RTL_R16(CPlusCmd) | PCIMulRW;
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tp->cp_cmd |= cmd | PCIMulRW;
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if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
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(tp->mac_version == RTL_GIGA_MAC_VER_03)) {
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@ -1895,7 +1917,15 @@ rtl8169_hw_start(struct net_device *dev)
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RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
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RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
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RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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if ((tp->mac_version != RTL_GIGA_MAC_VER_01) &&
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(tp->mac_version != RTL_GIGA_MAC_VER_02) &&
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(tp->mac_version != RTL_GIGA_MAC_VER_03) &&
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(tp->mac_version != RTL_GIGA_MAC_VER_04)) {
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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rtl8169_set_rx_tx_config_registers(tp);
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}
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RTL_W8(Cfg9346, Cfg9346_Lock);
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/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
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