sfc: Add efx_nic_type operation for register self-test
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2458,7 +2458,7 @@ static bool efx_masked_compare_oword(const efx_oword_t *a, const efx_oword_t *b,
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((a->u64[1] ^ b->u64[1]) & mask->u64[1]);
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((a->u64[1] ^ b->u64[1]) & mask->u64[1]);
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}
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}
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int falcon_test_registers(struct efx_nic *efx)
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static int falcon_b0_test_registers(struct efx_nic *efx)
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{
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{
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unsigned address = 0, i, j;
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unsigned address = 0, i, j;
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efx_oword_t mask, imask, original, reg, buf;
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efx_oword_t mask, imask, original, reg, buf;
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@ -3327,6 +3327,7 @@ struct efx_nic_type falcon_b0_nic_type = {
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.get_wol = falcon_get_wol,
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.get_wol = falcon_get_wol,
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.set_wol = falcon_set_wol,
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.set_wol = falcon_set_wol,
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.resume_wol = efx_port_dummy_op_void,
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.resume_wol = efx_port_dummy_op_void,
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.test_registers = falcon_b0_test_registers,
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.default_mac_ops = &falcon_xmac_operations,
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.default_mac_ops = &falcon_xmac_operations,
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.revision = EFX_REV_FALCON_B0,
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.revision = EFX_REV_FALCON_B0,
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@ -154,7 +154,6 @@ extern int falcon_reset_xaui(struct efx_nic *efx);
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struct falcon_nvconfig;
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struct falcon_nvconfig;
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extern int falcon_read_nvram(struct efx_nic *efx,
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extern int falcon_read_nvram(struct efx_nic *efx,
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struct falcon_nvconfig *nvconfig);
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struct falcon_nvconfig *nvconfig);
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extern int falcon_test_registers(struct efx_nic *efx);
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/**************************************************************************
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/**************************************************************************
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*
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*
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@ -864,6 +864,7 @@ static inline const char *efx_dev_name(struct efx_nic *efx)
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* @get_wol: Get WoL configuration from driver state
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* @get_wol: Get WoL configuration from driver state
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* @set_wol: Push WoL configuration to the NIC
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* @set_wol: Push WoL configuration to the NIC
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* @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
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* @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
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* @test_registers: Test read/write functionality of control registers
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* @default_mac_ops: efx_mac_operations to set at startup
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* @default_mac_ops: efx_mac_operations to set at startup
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* @revision: Hardware architecture revision
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* @revision: Hardware architecture revision
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* @mem_map_size: Memory BAR mapped size
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* @mem_map_size: Memory BAR mapped size
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@ -902,6 +903,7 @@ struct efx_nic_type {
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void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
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void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
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int (*set_wol)(struct efx_nic *efx, u32 type);
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int (*set_wol)(struct efx_nic *efx, u32 type);
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void (*resume_wol)(struct efx_nic *efx);
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void (*resume_wol)(struct efx_nic *efx);
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int (*test_registers)(struct efx_nic *efx);
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struct efx_mac_operations *default_mac_ops;
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struct efx_mac_operations *default_mac_ops;
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int revision;
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int revision;
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@ -122,14 +122,14 @@ static int efx_test_nvram(struct efx_nic *efx, struct efx_self_tests *tests)
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static int efx_test_chip(struct efx_nic *efx, struct efx_self_tests *tests)
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static int efx_test_chip(struct efx_nic *efx, struct efx_self_tests *tests)
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{
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{
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int rc;
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int rc = 0;
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/* Not supported on A-series silicon */
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/* Test register access */
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if (efx_nic_rev(efx) < EFX_REV_FALCON_B0)
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if (efx->type->test_registers) {
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return 0;
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rc = efx->type->test_registers(efx);
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rc = falcon_test_registers(efx);
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tests->registers = rc ? -1 : 1;
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tests->registers = rc ? -1 : 1;
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}
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return rc;
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return rc;
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}
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}
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