Renesas ARM Based SoC Fixes for v4.20
* R-Car V3H (r8a77980) based Condor board - Switch from EtherAVB to GEther to match offical boards * RZ/G2E (ra8774c0) SoC: correct documentation of part number * R-Car H3 (r8a7795) SoC: reinstate all DMA channels on HSCIF2 -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlvho1MACgkQ189kaWo3 T74ANBAAkjEzeIuF29/TFOAFs+EB9izdNSdj5WFv2Ec7jVxhB4knYf+eJ+U1nSUA gU8xRQBlZMULNxkFJIQYxjoE7yDQbNcUu3aiwuVripYTWxako95EeS0JrsRGdvia VEJYYqwx9ySNYHAFIesRfW5a8A9AF/WHRACvDZlX216hviy1sXNDyd8/pgbeMQGK ilRaUGkrdlqrQFbfneK3OWQiCkvmpaVV/t41EVILDQPe7PAPhDAYeYhzMOkKUAP6 N0pBJHAppFh0MvkD6RWVIFCoHPNYssd+abE3QWP26NED4mP3RVLH9xHggJuqwDX7 ocJf53Rh1HeZf8CXRuxx/vHdlSBfiUvYkvxgQCTbJbgj/u8hEgLOqHYoREw9NDR5 B0uE1cP+KRZiiFlqNcsBWgNUasfSlDciQ5Z9HrpO/VaKnVkkv3DfskaqjxC+XkEt TSVlKVYKBR2QmNxbsf7ofr3SnQ7NuY5I854fpqba76xEDog39BTIf14zzrpJhi+H isAaT5KjqhwwdLdFeMSHkPrm03tqv0fpO8U65tGvS9lHw+gSGSsonb7T8ZimVLv5 sDXO1j102N/e4vMbKSnRz02S9+oj9cBlIW3C1DohAEuUH8+xqnJ7BGKz0CY0zcOi sgWWlhUNswYspuM74PLPyY7Jm5S4BE1vvKqH7i+ZrUJd4tS7dSs= =D2ob -----END PGP SIGNATURE----- Merge tag 'renesas-fixes-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes Renesas ARM Based SoC Fixes for v4.20 * R-Car V3H (r8a77980) based Condor board - Switch from EtherAVB to GEther to match offical boards * RZ/G2E (ra8774c0) SoC: correct documentation of part number * R-Car H3 (r8a7795) SoC: reinstate all DMA channels on HSCIF2 * tag 'renesas-fixes-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: renesas: condor: switch from EtherAVB to GEther dt-bindings: arm: Fix RZ/G2E part number arm64: dts: renesas: r8a7795: add missing dma-names on hscif2 Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
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@ -27,7 +27,7 @@ SoCs:
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compatible = "renesas,r8a77470"
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- RZ/G2M (R8A774A1)
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compatible = "renesas,r8a774a1"
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- RZ/G2E (RA8774C0)
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- RZ/G2E (R8A774C0)
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compatible = "renesas,r8a774c0"
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- R-Car M1A (R8A77781)
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compatible = "renesas,r8a7778"
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@ -652,7 +652,7 @@
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac1 0x35>, <&dmac1 0x34>,
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<&dmac2 0x35>, <&dmac2 0x34>;
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dma-names = "tx", "rx";
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 518>;
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status = "disabled";
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@ -15,7 +15,7 @@
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aliases {
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serial0 = &scif0;
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ethernet0 = &avb;
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ethernet0 = &gether;
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};
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chosen {
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@ -97,23 +97,6 @@
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};
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};
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&avb {
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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phy-mode = "rgmii-id";
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phy-handle = <&phy0>;
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renesas,no-ether-link;
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status = "okay";
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phy0: ethernet-phy@0 {
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rxc-skew-ps = <1500>;
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reg = <0>;
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interrupt-parent = <&gpio1>;
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interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&canfd {
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pinctrl-0 = <&canfd0_pins>;
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pinctrl-names = "default";
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@ -139,6 +122,23 @@
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clock-frequency = <32768>;
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};
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&gether {
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pinctrl-0 = <&gether_pins>;
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pinctrl-names = "default";
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phy-mode = "rgmii-id";
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phy-handle = <&phy0>;
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renesas,no-ether-link;
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status = "okay";
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phy0: ethernet-phy@0 {
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rxc-skew-ps = <1500>;
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reg = <0>;
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interrupt-parent = <&gpio4>;
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interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&i2c0 {
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-names = "default";
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@ -236,16 +236,17 @@
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};
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&pfc {
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avb_pins: avb {
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groups = "avb_mdio", "avb_rgmii";
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function = "avb";
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};
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canfd0_pins: canfd0 {
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groups = "canfd0_data_a";
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function = "canfd0";
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};
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gether_pins: gether {
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groups = "gether_mdio_a", "gether_rgmii",
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"gether_txcrefclk", "gether_txcrefclk_mega";
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function = "gether";
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};
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i2c0_pins: i2c0 {
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groups = "i2c0";
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function = "i2c0";
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