[PATCH] fix "PCI: assign ioapic resource at hotplug"
Roland Dreier wrote:
> The change "PCI: assign ioapic resource at hotplug" (commit
> 2318627965
in Linus's tree) makes
> networking stop working on my system (SuperMicro H8QC8 with four
> dual-core Opteron 885 CPUs). In particular, the on-board NIC stops
> working, probably because it gets assigned the wrong IRQ (225 in the
> non-working case, 217 in the working case)
>
> With that patch applied, e1000 doesn't work. Reverting just that
> patch (shown below) from Linus's latest tree fixes things for me.
>
The cause of this problem might be an wrong assumption that the 'start'
member of resource structure for ioapic device has non-zero value if the
resources are assigned by firmware. The 'start' member of ioapic device
seems not to be set even though the resources were actually assigned to
ioapic devices by firmware.
Cc: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Cc: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com>
Cc: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com>
Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: Roland Dreier <rdreier@cisco.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
18e39913d4
commit
9bded00bf6
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@ -55,16 +55,16 @@ pbus_assign_resources_sorted(struct pci_bus *bus)
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list_for_each_entry(dev, &bus->devices, bus_list) {
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u16 class = dev->class >> 8;
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/* Don't touch classless devices or host bridges. */
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/* Don't touch classless devices or host bridges or ioapics. */
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if (class == PCI_CLASS_NOT_DEFINED ||
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class == PCI_CLASS_BRIDGE_HOST)
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continue;
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/* Don't touch ioapics if it has the assigned resources. */
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/* Don't touch ioapic devices already enabled by firmware */
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if (class == PCI_CLASS_SYSTEM_PIC) {
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res = &dev->resource[0];
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if (res[0].start || res[1].start || res[2].start ||
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res[3].start || res[4].start || res[5].start)
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u16 command;
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pci_read_config_word(dev, PCI_COMMAND, &command);
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if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
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continue;
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}
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