ARC: [dts] Rename cpu_intc -> core_intc
This is again for future changes to use common DTSI for timers which refer to @core_intc Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -26,7 +26,7 @@
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ranges = <0x00000000 0xf0000000 0x10000000>;
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cpu_intc: arc700-intc@cpu {
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core_intc: arc700-intc@cpu {
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compatible = "snps,arc700-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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@ -50,7 +50,7 @@
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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interrupts = <15>;
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};
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};
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@ -88,7 +88,7 @@
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compatible = "snps,dw-apb-ictl";
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reg = < 0xe0012000 0x200 >;
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interrupt-controller;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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interrupts = < 7 >;
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};
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@ -25,7 +25,7 @@
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ranges = <0x00000000 0xf0000000 0x10000000>;
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cpu_intc: archs-intc@cpu {
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core_intc: archs-intc@cpu {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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@ -49,7 +49,7 @@
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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interrupts = <25>;
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};
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};
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@ -68,7 +68,7 @@
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arcpct0: pct {
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compatible = "snps,archs-pct";
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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interrupts = <20>;
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};
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};
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@ -91,7 +91,7 @@
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compatible = "snps,dw-apb-ictl";
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reg = < 0xe0012000 0x200 >;
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interrupt-controller;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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interrupts = < 24 >;
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};
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@ -25,7 +25,7 @@
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ranges = <0x00000000 0xf0000000 0x10000000>;
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cpu_intc: archs-intc@cpu {
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core_intc: archs-intc@cpu {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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@ -34,7 +34,7 @@
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idu_intc: idu-interrupt-controller {
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compatible = "snps,archs-idu-intc";
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interrupt-controller;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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/*
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* <hwirq distribution>
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@ -91,7 +91,7 @@
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arcpct0: pct {
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compatible = "snps,archs-pct";
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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interrupts = <20>;
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};
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};
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@ -14,7 +14,7 @@
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clock-frequency = <80000000>; /* 80 MHZ */
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&core_intc>;
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chosen {
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bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";
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@ -32,7 +32,7 @@
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/* child and parent address space 1:1 mapped */
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ranges;
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intc: interrupt-controller {
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core_intc: interrupt-controller {
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compatible = "snps,arc700-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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@ -14,7 +14,7 @@
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clock-frequency = <20000000>; /* 20 MHZ */
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&core_intc>;
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chosen {
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/* this is for console on PGU */
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@ -35,7 +35,7 @@
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/* child and parent address space 1:1 mapped */
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ranges;
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intc: interrupt-controller {
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core_intc: interrupt-controller {
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compatible = "snps,arc700-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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@ -25,7 +25,7 @@
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ranges = <0x00000000 0xf0000000 0x10000000>;
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cpu_intc: archs-intc@cpu {
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core_intc: archs-intc@cpu {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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@ -35,7 +35,7 @@
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compatible = "snps,dw-apb-uart";
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reg = <0x5000 0x100>;
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clock-frequency = <2403200>;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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interrupts = <19>;
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baud = <115200>;
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reg-shift = <2>;
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@ -49,7 +49,7 @@
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compatible = "snps,dw-apb-ictl";
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reg = < 0xe0012000 0x200 >;
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interrupt-controller;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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interrupts = < 18 >;
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};
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@ -26,7 +26,7 @@
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ranges = <0x00000000 0xf0000000 0x10000000>;
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cpu_intc: archs-intc@cpu {
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core_intc: archs-intc@cpu {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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@ -35,7 +35,7 @@
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idu_intc: idu-interrupt-controller {
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compatible = "snps,archs-idu-intc";
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interrupt-controller;
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interrupt-parent = <&cpu_intc>;
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interrupt-parent = <&core_intc>;
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/*
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* <hwirq distribution>
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