IA64: sg chaining support
This updates the ia64 iommu/pci dma mappers to sg chaining. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
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@ -396,7 +396,7 @@ sba_dump_sg( struct ioc *ioc, struct scatterlist *startsg, int nents)
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printk(KERN_DEBUG " %d : DMA %08lx/%05x CPU %p\n", nents,
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startsg->dma_address, startsg->dma_length,
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sba_sg_address(startsg));
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startsg++;
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startsg = sg_next(startsg);
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}
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}
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@ -409,7 +409,7 @@ sba_check_sg( struct ioc *ioc, struct scatterlist *startsg, int nents)
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while (the_nents-- > 0) {
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if (sba_sg_address(the_sg) == 0x0UL)
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sba_dump_sg(NULL, startsg, nents);
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the_sg++;
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the_sg = sg_next(the_sg);
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}
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}
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@ -1201,7 +1201,7 @@ sba_fill_pdir(
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u32 pide = startsg->dma_address & ~PIDE_FLAG;
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dma_offset = (unsigned long) pide & ~iovp_mask;
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startsg->dma_address = 0;
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dma_sg++;
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dma_sg = sg_next(dma_sg);
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dma_sg->dma_address = pide | ioc->ibase;
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pdirp = &(ioc->pdir_base[pide >> iovp_shift]);
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n_mappings++;
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@ -1228,7 +1228,7 @@ sba_fill_pdir(
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pdirp++;
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} while (cnt > 0);
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}
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startsg++;
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startsg = sg_next(startsg);
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}
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/* force pdir update */
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wmb();
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@ -1297,7 +1297,7 @@ sba_coalesce_chunks( struct ioc *ioc,
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while (--nents > 0) {
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unsigned long vaddr; /* tmp */
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startsg++;
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startsg = sg_next(startsg);
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/* PARANOID */
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startsg->dma_address = startsg->dma_length = 0;
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@ -1407,7 +1407,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
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#ifdef ALLOW_IOV_BYPASS_SG
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ASSERT(to_pci_dev(dev)->dma_mask);
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if (likely((ioc->dma_mask & ~to_pci_dev(dev)->dma_mask) == 0)) {
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for (sg = sglist ; filled < nents ; filled++, sg++){
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for_each_sg(sglist, sg, nents, filled) {
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sg->dma_length = sg->length;
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sg->dma_address = virt_to_phys(sba_sg_address(sg));
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}
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@ -1501,7 +1501,7 @@ void sba_unmap_sg (struct device *dev, struct scatterlist *sglist, int nents, in
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while (nents && sglist->dma_length) {
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sba_unmap_single(dev, sglist->dma_address, sglist->dma_length, dir);
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sglist++;
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sglist = sg_next(sglist);
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nents--;
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}
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@ -218,16 +218,17 @@ EXPORT_SYMBOL(sn_dma_unmap_single);
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*
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* Unmap a set of streaming mode DMA translations.
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*/
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void sn_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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void sn_dma_unmap_sg(struct device *dev, struct scatterlist *sgl,
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int nhwentries, int direction)
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{
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int i;
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struct pci_dev *pdev = to_pci_dev(dev);
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struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
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struct scatterlist *sg;
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BUG_ON(dev->bus != &pci_bus_type);
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for (i = 0; i < nhwentries; i++, sg++) {
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for_each_sg(sgl, sg, nhwentries, i) {
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provider->dma_unmap(pdev, sg->dma_address, direction);
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sg->dma_address = (dma_addr_t) NULL;
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sg->dma_length = 0;
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@ -244,11 +245,11 @@ EXPORT_SYMBOL(sn_dma_unmap_sg);
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*
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* Maps each entry of @sg for DMA.
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*/
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int sn_dma_map_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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int sn_dma_map_sg(struct device *dev, struct scatterlist *sgl, int nhwentries,
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int direction)
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{
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unsigned long phys_addr;
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struct scatterlist *saved_sg = sg;
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struct scatterlist *saved_sg = sgl, *sg;
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struct pci_dev *pdev = to_pci_dev(dev);
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struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
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int i;
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@ -258,7 +259,7 @@ int sn_dma_map_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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/*
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* Setup a DMA address for each entry in the scatterlist.
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*/
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for (i = 0; i < nhwentries; i++, sg++) {
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for_each_sg(sgl, sg, nhwentries, i) {
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phys_addr = SG_ENT_PHYS_ADDRESS(sg);
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sg->dma_address = provider->dma_map(pdev,
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phys_addr, sg->length,
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@ -6,7 +6,7 @@
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <asm/machvec.h>
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#include <asm/scatterlist.h>
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#include <linux/scatterlist.h>
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#define dma_alloc_coherent platform_dma_alloc_coherent
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/* coherent mem. is cheap */
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@ -30,4 +30,6 @@ struct scatterlist {
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#define sg_dma_len(sg) ((sg)->dma_length)
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#define sg_dma_address(sg) ((sg)->dma_address)
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#define ARCH_HAS_SG_CHAIN
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#endif /* _ASM_IA64_SCATTERLIST_H */
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