spi: davinci: handle DMA completion errors correctly
Do not simply clean the DMA channel on a DMA completion error. Instead, use wcount and rcount members of davinci_spi to detecion non-completion of DMA and signal EIO to the application. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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523c37e700
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9b189fd758
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@ -388,24 +388,26 @@ static int davinci_spi_setup_transfer(struct spi_device *spi,
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static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data)
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{
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struct davinci_spi_dma *davinci_spi_dma = data;
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struct davinci_spi *davinci_spi = data;
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struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
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edma_stop(davinci_spi_dma->dma_rx_channel);
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if (ch_status == DMA_COMPLETE)
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edma_stop(davinci_spi_dma->dma_rx_channel);
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else
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edma_clean_channel(davinci_spi_dma->dma_rx_channel);
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davinci_spi->rcount = 0;
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complete(&davinci_spi_dma->dma_rx_completion);
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}
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static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data)
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{
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struct davinci_spi_dma *davinci_spi_dma = data;
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struct davinci_spi *davinci_spi = data;
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struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
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edma_stop(davinci_spi_dma->dma_tx_channel);
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if (ch_status == DMA_COMPLETE)
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edma_stop(davinci_spi_dma->dma_tx_channel);
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else
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edma_clean_channel(davinci_spi_dma->dma_tx_channel);
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davinci_spi->wcount = 0;
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complete(&davinci_spi_dma->dma_tx_completion);
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}
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@ -632,7 +634,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
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{
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struct davinci_spi *davinci_spi;
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int int_status = 0;
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int count;
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unsigned rx_buf_count;
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struct davinci_spi_dma *davinci_spi_dma;
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int data_type, ret;
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@ -648,20 +649,20 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
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davinci_spi_dma = &davinci_spi->dma_channels;
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/* convert len to words based on bits_per_word */
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data_type = davinci_spi->bytes_per_word[spi->chip_select];
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tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1;
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rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF;
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davinci_spi->tx = t->tx_buf;
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davinci_spi->rx = t->rx_buf;
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/* convert len to words based on bits_per_word */
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data_type = davinci_spi->bytes_per_word[spi->chip_select];
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davinci_spi->wcount = t->len / data_type;
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davinci_spi->rcount = davinci_spi->wcount;
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init_completion(&davinci_spi_dma->dma_rx_completion);
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init_completion(&davinci_spi_dma->dma_tx_completion);
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count = t->len / data_type; /* the number of elements */
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/* disable all interrupts for dma transfers */
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clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
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/* Enable SPI */
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@ -680,18 +681,18 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
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*/
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if (t->tx_buf) {
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t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count,
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DMA_TO_DEVICE);
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t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf,
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davinci_spi->wcount, DMA_TO_DEVICE);
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if (dma_mapping_error(&spi->dev, t->tx_dma)) {
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dev_dbg(sdev, "Unable to DMA map a %d bytes"
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" TX buffer\n", count);
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dev_dbg(sdev, "Unable to DMA map %d bytes TX buffer\n",
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davinci_spi->wcount);
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return -ENOMEM;
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}
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}
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param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel);
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param.src = t->tx_buf ? t->tx_dma : tx_reg;
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param.a_b_cnt = count << 16 | data_type;
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param.a_b_cnt = davinci_spi->wcount << 16 | data_type;
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param.dst = tx_reg;
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param.src_dst_bidx = t->tx_buf ? data_type : 0;
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param.link_bcntrld = 0xffff;
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@ -715,7 +716,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
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if (t->rx_buf) {
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rx_buf = t->rx_buf;
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rx_buf_count = count;
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rx_buf_count = davinci_spi->rcount;
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} else {
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rx_buf = davinci_spi->rx_tmp_buf;
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rx_buf_count = sizeof(davinci_spi->rx_tmp_buf);
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@ -727,13 +728,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
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dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
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rx_buf_count);
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if (t->tx_buf)
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dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE);
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dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
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DMA_TO_DEVICE);
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return -ENOMEM;
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}
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param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel);
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param.src = rx_reg;
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param.a_b_cnt = count << 16 | data_type;
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param.a_b_cnt = davinci_spi->rcount << 16 | data_type;
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param.dst = t->rx_dma;
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param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16;
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param.link_bcntrld = 0xffff;
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@ -754,7 +756,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
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wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion);
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if (t->tx_buf)
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dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE);
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dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount,
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DMA_TO_DEVICE);
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dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE);
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@ -770,15 +773,21 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
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if (ret != 0)
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return ret;
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if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) {
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dev_err(sdev, "SPI data transfer error\n");
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return -EIO;
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}
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return t->len;
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}
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static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma)
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static int davinci_spi_request_dma(struct davinci_spi *davinci_spi)
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{
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int r;
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struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels;
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r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel,
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davinci_spi_dma_rx_callback, davinci_spi_dma,
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davinci_spi_dma_rx_callback, davinci_spi,
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davinci_spi_dma->eventq);
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if (r < 0) {
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pr_err("Unable to request DMA channel for SPI RX\n");
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@ -787,7 +796,7 @@ static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma)
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}
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r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel,
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davinci_spi_dma_tx_callback, davinci_spi_dma,
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davinci_spi_dma_tx_callback, davinci_spi,
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davinci_spi_dma->eventq);
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if (r < 0) {
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pr_err("Unable to request DMA channel for SPI TX\n");
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@ -929,7 +938,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
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davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan;
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davinci_spi->dma_channels.eventq = dma_eventq;
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ret = davinci_spi_request_dma(&davinci_spi->dma_channels);
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ret = davinci_spi_request_dma(davinci_spi);
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if (ret)
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goto free_clk;
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