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Samsung DTS ARM changes for v5.3, second round 

1. Add camera flash to Galaxy S3 boards,
 2. Fix PMU affinity interrupt warning on Exynos4,
 3. Improve regulator configuration on Odroid XU3/XU4/HC1 family and
    Arndale Octa by disabling unneeded regulators and adding suspend
    configuration.  The suspend configuration brings significant reduce of
    energy usage in Suspend to RAM (e.g. 120 -> ~7 mA on Odroid HC1).
 4. Add Mali nodes to Exynos3 and Exynos4.
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Merge tag 'samsung-dt-5.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.3, second round

1. Add camera flash to Galaxy S3 boards,
2. Fix PMU affinity interrupt warning on Exynos4,
3. Improve regulator configuration on Odroid XU3/XU4/HC1 family and
   Arndale Octa by disabling unneeded regulators and adding suspend
   configuration.  The suspend configuration brings significant reduce of
   energy usage in Suspend to RAM (e.g. 120 -> ~7 mA on Odroid HC1).
4. Add Mali nodes to Exynos3 and Exynos4.

* tag 'samsung-dt-5.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: Add GPU/Mali 400 node to Exynos4
  ARM: dts: exynos: Add GPU/Mali 400 node to Exynos3250
  dt-bindings: gpu: mali: Add Samsung compatibles for Midgard and Utgard
  ARM: dts: exynos: Use proper regulator for eMMC memory on Arndale Octa
  ARM: dts: exynos: Add regulator suspend configuration to Odroid XU3/XU4/HC1 family
  ARM: dts: exynos: Add regulator suspend configuration to Arndale Octa board
  ARM: dts: exynos: Disable unused buck10 regulator on Odroid HC1 board
  ARM: dts: exynos: Fix language typo and indentation
  ARM: dts: exynos: Add PMU interrupt affinity to Exynos4 boards
  ARM: dts: exynos: Add flash support to Galaxy S3 boards

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-06-26 19:23:08 -07:00
parent 3395a968e5 13efd80aca
commit 9aa7ae4330
20 changed files with 392 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
View File

@ -16,6 +16,7 @@ Required properties:
+ "arm,mali-t880"
* which must be preceded by one of the following vendor specifics:
+ "amlogic,meson-gxm-mali"
+ "samsung,exynos5433-mali"
+ "rockchip,rk3288-mali"
+ "rockchip,rk3399-mali"

1
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
View File

@ -17,6 +17,7 @@ Required properties:
+ amlogic,meson8b-mali
+ amlogic,meson-gxbb-mali
+ amlogic,meson-gxl-mali
+ samsung,exynos4210-mali
+ rockchip,rk3036-mali
+ rockchip,rk3066-mali
+ rockchip,rk3188-mali

5
arch/arm/boot/dts/exynos3250-artik5.dtsi
View File

@ -59,6 +59,11 @@
cpu0-supply = <&buck2_reg>;
};
&gpu {
mali-supply = <&buck3_reg>;
status = "okay";
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;

5
arch/arm/boot/dts/exynos3250-monk.dts
View File

@ -172,6 +172,11 @@
status = "okay";
};
&gpu {
mali-supply = <&buck3_reg>;
status = "okay";
};
&hsotg {
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;

5
arch/arm/boot/dts/exynos3250-rinato.dts
View File

@ -244,6 +244,11 @@
};
};
&gpu {
mali-supply = <&buck3_reg>;
status = "okay";
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;

33
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -126,6 +126,39 @@
};
};
gpu: gpu@13000000 {
compatible = "samsung,exynos4210-mali", "arm,mali-400";
reg = <0x13000000 0x10000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp",
"gpmmu",
"pp0",
"ppmmu0",
"pp1",
"ppmmu1",
"pp2",
"ppmmu2",
"pp3",
"ppmmu3",
"pmu";
clocks = <&cmu CLK_G3D>,
<&cmu CLK_SCLK_G3D>;
clock-names = "bus", "core";
power-domains = <&pd_g3d>;
status = "disabled";
/* TODO: operating points for DVFS, assigned clock as 134 MHz */
};
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,

38
arch/arm/boot/dts/exynos4.dtsi
View File

@ -51,10 +51,46 @@
serial3 = &serial_3;
};
gpu: gpu@13000000 {
compatible = "samsung,exynos4210-mali", "arm,mali-400";
reg = <0x13000000 0x10000>;
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp",
"gpmmu",
"pp0",
"ppmmu0",
"pp1",
"ppmmu1",
"pp2",
"ppmmu2",
"pp3",
"ppmmu3",
"pmu";
/*
* CLK_G3D is not actually bus clock but a IP-level clock.
* The bus clock is not described in hardware manual.
*/
clocks = <&clock CLK_G3D>,
<&clock CLK_SCLK_G3D>;
clock-names = "bus", "core";
power-domains = <&pd_g3d>;
status = "disabled";
};
pmu: pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>;
status = "disabled";
};
soc: soc {

5
arch/arm/boot/dts/exynos4210-origen.dts
View File

@ -132,6 +132,11 @@
status = "okay";
};
&gpu {
mali-supply = <&buck3_reg>;
status = "okay";
};
&hsotg {
vusb_d-supply = <&ldo3_reg>;
vusb_a-supply = <&ldo8_reg>;

4
arch/arm/boot/dts/exynos4210-trats.dts
View File

@ -239,6 +239,10 @@
status = "okay";
};
&gpu {
status = "okay";
};
&hsotg {
vusb_d-supply = <&vusb_reg>;
vusb_a-supply = <&vusbdac_reg>;

5
arch/arm/boot/dts/exynos4210-universal_c210.dts
View File

@ -262,6 +262,11 @@
};
};
&gpu {
mali-supply = <&buck2_reg>;
status = "okay";
};
&hdmi {
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";

31
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -8,7 +8,7 @@
* www.linaro.org
*
* Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
* based board files can include this file and provide values for board specfic
* based board files can include this file and provide values for board specific
* bindings.
*
* Note: This file does not include device nodes for all the controllers in
@ -381,13 +381,13 @@
trips {
cpu_alert0: cpu-alert-0 {
temperature = <85000>; /* millicelsius */
temperature = <85000>; /* millicelsius */
};
cpu_alert1: cpu-alert-1 {
temperature = <100000>; /* millicelsius */
temperature = <100000>; /* millicelsius */
};
cpu_alert2: cpu-alert-2 {
temperature = <110000>; /* millicelsius */
temperature = <110000>; /* millicelsius */
};
};
};
@ -449,6 +449,23 @@
samsung,lcd-wb;
};
&gpu {
operating-points-v2 = <&gpu_opp_table>;
gpu_opp_table: opp_table {
compatible = "operating-points-v2";
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-microvolt = <950000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <1050000>;
};
};
};
&mdma1 {
power-domains = <&pd_lcd0>;
};
@ -461,6 +478,12 @@
<&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
};
&pmu {
interrupts = <2 2>, <3 2>;
interrupt-affinity = <&cpu0>, <&cpu1>;
status = "okay";
};
&pmu_system_controller {
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";

32
arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi
View File

@ -15,6 +15,24 @@
i2c10 = &i2c_cm36651;
};
aat1290 {
compatible = "skyworks,aat1290";
flen-gpios = <&gpj1 1 GPIO_ACTIVE_HIGH>;
enset-gpios = <&gpj1 2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default", "host", "isp";
pinctrl-0 = <&camera_flash_host>;
pinctrl-1 = <&camera_flash_host>;
pinctrl-2 = <&camera_flash_isp>;
flash-led {
label = "flash";
led-max-microamp = <520833>;
flash-max-microamp = <1012500>;
flash-max-timeout-us = <1940000>;
};
};
lcd_vdd3_reg: voltage-regulator-6 {
compatible = "regulator-fixed";
regulator-name = "LCD_VDD_2.2V";
@ -131,6 +149,20 @@
regulator-max-microvolt = <2800000>;
};
&pinctrl_0 {
camera_flash_host: camera-flash-host {
samsung,pins = "gpj1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-val = <0>;
};
camera_flash_isp: camera-flash-isp {
samsung,pins = "gpj1-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-val = <1>;
};
};
&s5c73m3 {
standby-gpios = <&gpm0 1 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */
vdda-supply = <&ldo17_reg>;

5
arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
View File

@ -115,6 +115,11 @@
cpu0-supply = <&buck2_reg>;
};
&gpu {
mali-supply = <&buck4_reg>;
status = "okay";
};
&hsotg {
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;

5
arch/arm/boot/dts/exynos4412-midas.dtsi
View File

@ -453,6 +453,11 @@
status = "okay";
};
&gpu {
mali-supply = <&buck4_reg>;
status = "okay";
};
&hdmi {
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";

5
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View File

@ -229,6 +229,11 @@
assigned-clock-rates = <0>, <176000000>;
};
&gpu {
mali-supply = <&buck4_reg>;
status = "okay";
};
&hdmi {
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";

7
arch/arm/boot/dts/exynos4412-prime.dtsi
View File

@ -38,3 +38,10 @@
cooling-device = <&cpu0 15 15>, <&cpu1 15 15>,
<&cpu2 15 15>, <&cpu3 15 15>;
};
&gpu_opp_table {
opp-533000000 {
opp-hz = /bits/ 64 <533000000>;
opp-microvolt = <1075000>;
};
};

27
arch/arm/boot/dts/exynos4412.dtsi
View File

@ -716,6 +716,31 @@
cpu-offset = <0x4000>;
};
&gpu {
operating-points-v2 = <&gpu_opp_table>;
gpu_opp_table: opp_table {
compatible = "operating-points-v2";
opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
opp-microvolt = <875000>;
};
opp-267000000 {
opp-hz = /bits/ 64 <267000000>;
opp-microvolt = <900000>;
};
opp-350000000 {
opp-hz = /bits/ 64 <350000000>;
opp-microvolt = <950000>;
};
opp-440000000 {
opp-hz = /bits/ 64 <440000000>;
opp-microvolt = <1025000>;
};
};
};
&hdmi {
compatible = "samsung,exynos4212-hdmi";
};
@ -737,6 +762,8 @@
&pmu {
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
status = "okay";
};
&pmu_system_controller {

82
arch/arm/boot/dts/exynos5420-arndale-octa.dts
View File

@ -386,6 +386,10 @@
* (Linaro for Arndale Octa, v2012.07).
*/
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo4_reg: LDO4 {
@ -411,6 +415,10 @@
regulator-name = "PVDD_ANAIP_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo8_reg: LDO8 {
@ -451,6 +459,10 @@
regulator-name = "PVDD_APIO_MMCOFF_2V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo14_reg: LDO14 {
@ -464,12 +476,20 @@
regulator-name = "PVDD_PERI_2V8";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo16_reg: LDO16 {
regulator-name = "PVDD_PERI_3V3";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo17_reg: LDO17 {
@ -483,12 +503,28 @@
regulator-name = "PVDD_EMMC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
/*
* Must stay in "off" mode during shutdown for
* proper eMMC reset. The "off" mode is in
* fact controlled by LDO18EN. The eMMC does
* not have reset pin connected so the reset
* will be triggered by falling edge of
* LDO18EN.
*/
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo19_reg: LDO19 {
regulator-name = "PVDD_TFLASH_2V8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo20_reg: LDO20 {
@ -515,12 +551,20 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo24_reg: LDO24 {
regulator-name = "PVDD_CAM1_AVDD_2V8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo25_reg: LDO25 {
@ -540,6 +584,10 @@
regulator-name = "PVDD_G3DS_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo28_reg: LDO28 {
@ -617,6 +665,10 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck2_reg: BUCK2 {
@ -624,6 +676,10 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck3_reg: BUCK3 {
@ -631,12 +687,20 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck4_reg: BUCK4 {
regulator-name = "PVDD_G3D_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck5_reg: BUCK5 {
@ -651,6 +715,10 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck7_reg: BUCK7 {
@ -678,6 +746,18 @@
regulator-name = "PVDD_EMMCF_2V8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
/*
* Must stay in "off" mode during shutdown for
* proper eMMC reset. The "off" mode is in
* fact controlled by BUCK10EN. The eMMC does
* not have reset pin connected so the reset
* will be triggered by falling edge of
* BUCK10EN.
*/
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
@ -700,7 +780,7 @@
samsung,dw-mshc-ddr-timing = <0 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
vmmc-supply = <&ldo10_reg>;
vmmc-supply = <&ldo18_reg>;
vqmmc-supply = <&ldo3_reg>;
bus-width = <8>;
cap-mmc-highspeed;

98
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
View File

@ -177,6 +177,10 @@
regulator-name = "vdd_adc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo5_reg: LDO5 {
@ -184,6 +188,10 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo6_reg: LDO6 {
@ -191,6 +199,10 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo7_reg: LDO7 {
@ -198,6 +210,10 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo8_reg: LDO8 {
@ -205,6 +221,10 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo9_reg: LDO9 {
@ -212,6 +232,10 @@
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo10_reg: LDO10 {
@ -219,6 +243,10 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo11_reg: LDO11 {
@ -226,6 +254,10 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo12_reg: LDO12 {
@ -239,6 +271,10 @@
regulator-name = "vddq_mmc2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo14_reg: LDO14 {
@ -253,6 +289,10 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo16_reg: LDO16 {
@ -267,18 +307,30 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo18_reg: LDO18 {
regulator-name = "vdd_emmc_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo19_reg: LDO19 {
regulator-name = "vdd_sd";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo20_reg: LDO20 {
@ -307,6 +359,10 @@
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo24_reg: LDO24 {
@ -328,6 +384,10 @@
regulator-name = "vdd_ldo26";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo27_reg: LDO27 {
@ -335,6 +395,10 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo28_reg: LDO28 {
@ -342,6 +406,10 @@
regulator-name = "vdd_ldo28";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo29_reg: LDO29 {
@ -420,6 +488,10 @@
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck2_reg: BUCK2 {
@ -428,6 +500,10 @@
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck3_reg: BUCK3 {
@ -436,6 +512,10 @@
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck4_reg: BUCK4 {
@ -444,6 +524,10 @@
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck5_reg: BUCK5 {
@ -460,6 +544,10 @@
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck7_reg: BUCK7 {
@ -484,14 +572,20 @@
regulator-max-microvolt = <3750000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck10_reg: BUCK10 {
regulator-name = "vdd_vmem";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};

6
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
View File

@ -360,6 +360,12 @@
};
};
&buck10_reg {
/* Supplies vmmc-supply of mmc_0 */
regulator-always-on;
regulator-boot-on;
};
&hdmi {
status = "okay";
ddc = <&i2c_2>;