Merge branch 'x86/apic' into cpus4096
This done for conflict prevention: we merge it into the cpus4096 tree because upcoming cpumask changes will touch apic.c that would collide with x86/apic otherwise.
This commit is contained in:
commit
9a3d8f735e
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@ -441,6 +441,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
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v = apic_read(APIC_LVTT);
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v = apic_read(APIC_LVTT);
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v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
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v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
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apic_write(APIC_LVTT, v);
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apic_write(APIC_LVTT, v);
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apic_write(APIC_TMICT, 0xffffffff);
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break;
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break;
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case CLOCK_EVT_MODE_RESUME:
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case CLOCK_EVT_MODE_RESUME:
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/* Nothing to do here */
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/* Nothing to do here */
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@ -559,13 +560,13 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
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} else {
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} else {
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res = (((u64)deltapm) * mult) >> 22;
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res = (((u64)deltapm) * mult) >> 22;
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do_div(res, 1000000);
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do_div(res, 1000000);
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printk(KERN_WARNING "APIC calibration not consistent "
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pr_warning("APIC calibration not consistent "
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"with PM Timer: %ldms instead of 100ms\n",
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"with PM Timer: %ldms instead of 100ms\n",
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(long)res);
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(long)res);
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/* Correct the lapic counter value */
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/* Correct the lapic counter value */
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res = (((u64)(*delta)) * pm_100ms);
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res = (((u64)(*delta)) * pm_100ms);
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do_div(res, deltapm);
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do_div(res, deltapm);
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printk(KERN_INFO "APIC delta adjusted to PM-Timer: "
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pr_info("APIC delta adjusted to PM-Timer: "
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"%lu (%ld)\n", (unsigned long)res, *delta);
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"%lu (%ld)\n", (unsigned long)res, *delta);
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*delta = (long)res;
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*delta = (long)res;
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}
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}
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@ -645,8 +646,7 @@ static int __init calibrate_APIC_clock(void)
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*/
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*/
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if (calibration_result < (1000000 / HZ)) {
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if (calibration_result < (1000000 / HZ)) {
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local_irq_enable();
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local_irq_enable();
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printk(KERN_WARNING
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pr_warning("APIC frequency too slow, disabling apic timer\n");
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"APIC frequency too slow, disabling apic timer\n");
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return -1;
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return -1;
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}
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}
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@ -672,13 +672,9 @@ static int __init calibrate_APIC_clock(void)
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while (lapic_cal_loops <= LAPIC_CAL_LOOPS)
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while (lapic_cal_loops <= LAPIC_CAL_LOOPS)
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cpu_relax();
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cpu_relax();
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local_irq_disable();
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/* Stop the lapic timer */
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/* Stop the lapic timer */
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lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt);
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lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt);
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local_irq_enable();
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/* Jiffies delta */
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/* Jiffies delta */
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deltaj = lapic_cal_j2 - lapic_cal_j1;
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deltaj = lapic_cal_j2 - lapic_cal_j1;
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apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
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apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
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@ -692,8 +688,7 @@ static int __init calibrate_APIC_clock(void)
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local_irq_enable();
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local_irq_enable();
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if (levt->features & CLOCK_EVT_FEAT_DUMMY) {
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if (levt->features & CLOCK_EVT_FEAT_DUMMY) {
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printk(KERN_WARNING
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pr_warning("APIC timer disabled due to verification failure.\n");
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"APIC timer disabled due to verification failure.\n");
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return -1;
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return -1;
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}
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}
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@ -714,7 +709,7 @@ void __init setup_boot_APIC_clock(void)
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* broadcast mechanism is used. On UP systems simply ignore it.
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* broadcast mechanism is used. On UP systems simply ignore it.
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*/
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*/
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if (disable_apic_timer) {
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if (disable_apic_timer) {
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printk(KERN_INFO "Disabling APIC timer\n");
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pr_info("Disabling APIC timer\n");
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/* No broadcast on UP ! */
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/* No broadcast on UP ! */
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if (num_possible_cpus() > 1) {
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if (num_possible_cpus() > 1) {
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lapic_clockevent.mult = 1;
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lapic_clockevent.mult = 1;
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@ -741,7 +736,7 @@ void __init setup_boot_APIC_clock(void)
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if (nmi_watchdog != NMI_IO_APIC)
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if (nmi_watchdog != NMI_IO_APIC)
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lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
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lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
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else
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else
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printk(KERN_WARNING "APIC timer registered as dummy,"
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pr_warning("APIC timer registered as dummy,"
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" due to nmi_watchdog=%d!\n", nmi_watchdog);
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" due to nmi_watchdog=%d!\n", nmi_watchdog);
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/* Setup the lapic or request the broadcast */
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/* Setup the lapic or request the broadcast */
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@ -773,8 +768,7 @@ static void local_apic_timer_interrupt(void)
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* spurious.
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* spurious.
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*/
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*/
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if (!evt->event_handler) {
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if (!evt->event_handler) {
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printk(KERN_WARNING
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pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu);
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"Spurious LAPIC timer interrupt on cpu %d\n", cpu);
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/* Switch it off */
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/* Switch it off */
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lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt);
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lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt);
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return;
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return;
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@ -1093,7 +1087,7 @@ static void __cpuinit lapic_setup_esr(void)
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unsigned int oldvalue, value, maxlvt;
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unsigned int oldvalue, value, maxlvt;
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if (!lapic_is_integrated()) {
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if (!lapic_is_integrated()) {
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printk(KERN_INFO "No ESR for 82489DX.\n");
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pr_info("No ESR for 82489DX.\n");
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return;
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return;
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}
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}
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@ -1104,7 +1098,7 @@ static void __cpuinit lapic_setup_esr(void)
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* ESR disabled - we can't do anything useful with the
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* ESR disabled - we can't do anything useful with the
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* errors anyway - mbligh
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* errors anyway - mbligh
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*/
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*/
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printk(KERN_INFO "Leaving ESR disabled.\n");
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pr_info("Leaving ESR disabled.\n");
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return;
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return;
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}
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}
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@ -1298,7 +1292,7 @@ void check_x2apic(void)
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rdmsr(MSR_IA32_APICBASE, msr, msr2);
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rdmsr(MSR_IA32_APICBASE, msr, msr2);
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if (msr & X2APIC_ENABLE) {
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if (msr & X2APIC_ENABLE) {
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printk("x2apic enabled by BIOS, switching to x2apic ops\n");
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pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
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x2apic_preenabled = x2apic = 1;
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x2apic_preenabled = x2apic = 1;
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apic_ops = &x2apic_ops;
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apic_ops = &x2apic_ops;
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}
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}
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@ -1310,7 +1304,7 @@ void enable_x2apic(void)
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rdmsr(MSR_IA32_APICBASE, msr, msr2);
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rdmsr(MSR_IA32_APICBASE, msr, msr2);
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if (!(msr & X2APIC_ENABLE)) {
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if (!(msr & X2APIC_ENABLE)) {
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printk("Enabling x2apic\n");
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pr_info("Enabling x2apic\n");
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wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0);
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wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0);
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}
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}
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}
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}
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@ -1325,9 +1319,8 @@ void __init enable_IR_x2apic(void)
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return;
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return;
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if (!x2apic_preenabled && disable_x2apic) {
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if (!x2apic_preenabled && disable_x2apic) {
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printk(KERN_INFO
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pr_info("Skipped enabling x2apic and Interrupt-remapping "
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"Skipped enabling x2apic and Interrupt-remapping "
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"because of nox2apic\n");
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"because of nox2apic\n");
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return;
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return;
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}
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}
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@ -1335,22 +1328,19 @@ void __init enable_IR_x2apic(void)
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panic("Bios already enabled x2apic, can't enforce nox2apic");
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panic("Bios already enabled x2apic, can't enforce nox2apic");
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if (!x2apic_preenabled && skip_ioapic_setup) {
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if (!x2apic_preenabled && skip_ioapic_setup) {
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printk(KERN_INFO
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pr_info("Skipped enabling x2apic and Interrupt-remapping "
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"Skipped enabling x2apic and Interrupt-remapping "
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"because of skipping io-apic setup\n");
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"because of skipping io-apic setup\n");
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return;
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return;
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}
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}
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ret = dmar_table_init();
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ret = dmar_table_init();
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if (ret) {
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if (ret) {
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printk(KERN_INFO
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pr_info("dmar_table_init() failed with %d:\n", ret);
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"dmar_table_init() failed with %d:\n", ret);
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if (x2apic_preenabled)
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if (x2apic_preenabled)
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panic("x2apic enabled by bios. But IR enabling failed");
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panic("x2apic enabled by bios. But IR enabling failed");
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else
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else
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printk(KERN_INFO
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pr_info("Not enabling x2apic,Intr-remapping\n");
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"Not enabling x2apic,Intr-remapping\n");
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return;
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return;
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}
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}
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@ -1359,7 +1349,7 @@ void __init enable_IR_x2apic(void)
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ret = save_mask_IO_APIC_setup();
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ret = save_mask_IO_APIC_setup();
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if (ret) {
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if (ret) {
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printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret);
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pr_info("Saving IO-APIC state failed: %d\n", ret);
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goto end;
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goto end;
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}
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}
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@ -1394,14 +1384,11 @@ end:
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if (!ret) {
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if (!ret) {
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if (!x2apic_preenabled)
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if (!x2apic_preenabled)
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printk(KERN_INFO
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pr_info("Enabled x2apic and interrupt-remapping\n");
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"Enabled x2apic and interrupt-remapping\n");
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else
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else
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printk(KERN_INFO
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pr_info("Enabled Interrupt-remapping\n");
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"Enabled Interrupt-remapping\n");
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} else
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} else
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printk(KERN_ERR
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pr_err("Failed to enable Interrupt-remapping and x2apic\n");
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"Failed to enable Interrupt-remapping and x2apic\n");
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#else
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#else
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if (!cpu_has_x2apic)
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if (!cpu_has_x2apic)
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return;
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return;
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@ -1410,8 +1397,8 @@ end:
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panic("x2apic enabled prior OS handover,"
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panic("x2apic enabled prior OS handover,"
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" enable CONFIG_INTR_REMAP");
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" enable CONFIG_INTR_REMAP");
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|
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printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping "
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pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping "
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" and x2apic\n");
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" and x2apic\n");
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#endif
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#endif
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return;
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return;
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@ -1428,7 +1415,7 @@ end:
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static int __init detect_init_APIC(void)
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static int __init detect_init_APIC(void)
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{
|
{
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if (!cpu_has_apic) {
|
if (!cpu_has_apic) {
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printk(KERN_INFO "No local APIC present\n");
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pr_info("No local APIC present\n");
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return -1;
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return -1;
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}
|
}
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||||||
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|
||||||
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@ -1469,8 +1456,8 @@ static int __init detect_init_APIC(void)
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* "lapic" specified.
|
* "lapic" specified.
|
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*/
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*/
|
||||||
if (!force_enable_local_apic) {
|
if (!force_enable_local_apic) {
|
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printk(KERN_INFO "Local APIC disabled by BIOS -- "
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pr_info("Local APIC disabled by BIOS -- "
|
||||||
"you can enable it with \"lapic\"\n");
|
"you can enable it with \"lapic\"\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
/*
|
/*
|
||||||
|
@ -1480,8 +1467,7 @@ static int __init detect_init_APIC(void)
|
||||||
*/
|
*/
|
||||||
rdmsr(MSR_IA32_APICBASE, l, h);
|
rdmsr(MSR_IA32_APICBASE, l, h);
|
||||||
if (!(l & MSR_IA32_APICBASE_ENABLE)) {
|
if (!(l & MSR_IA32_APICBASE_ENABLE)) {
|
||||||
printk(KERN_INFO
|
pr_info("Local APIC disabled by BIOS -- reenabling.\n");
|
||||||
"Local APIC disabled by BIOS -- reenabling.\n");
|
|
||||||
l &= ~MSR_IA32_APICBASE_BASE;
|
l &= ~MSR_IA32_APICBASE_BASE;
|
||||||
l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE;
|
l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE;
|
||||||
wrmsr(MSR_IA32_APICBASE, l, h);
|
wrmsr(MSR_IA32_APICBASE, l, h);
|
||||||
|
@ -1494,7 +1480,7 @@ static int __init detect_init_APIC(void)
|
||||||
*/
|
*/
|
||||||
features = cpuid_edx(1);
|
features = cpuid_edx(1);
|
||||||
if (!(features & (1 << X86_FEATURE_APIC))) {
|
if (!(features & (1 << X86_FEATURE_APIC))) {
|
||||||
printk(KERN_WARNING "Could not enable APIC!\n");
|
pr_warning("Could not enable APIC!\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
|
set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
|
||||||
|
@ -1505,14 +1491,14 @@ static int __init detect_init_APIC(void)
|
||||||
if (l & MSR_IA32_APICBASE_ENABLE)
|
if (l & MSR_IA32_APICBASE_ENABLE)
|
||||||
mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
|
mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
|
||||||
|
|
||||||
printk(KERN_INFO "Found and enabled local APIC!\n");
|
pr_info("Found and enabled local APIC!\n");
|
||||||
|
|
||||||
apic_pm_activate();
|
apic_pm_activate();
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
no_apic:
|
no_apic:
|
||||||
printk(KERN_INFO "No local APIC present or hardware disabled\n");
|
pr_info("No local APIC present or hardware disabled\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -1588,12 +1574,12 @@ int __init APIC_init_uniprocessor(void)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_X86_64
|
#ifdef CONFIG_X86_64
|
||||||
if (disable_apic) {
|
if (disable_apic) {
|
||||||
printk(KERN_INFO "Apic disabled\n");
|
pr_info("Apic disabled\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
if (!cpu_has_apic) {
|
if (!cpu_has_apic) {
|
||||||
disable_apic = 1;
|
disable_apic = 1;
|
||||||
printk(KERN_INFO "Apic disabled by BIOS\n");
|
pr_info("Apic disabled by BIOS\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
|
@ -1605,8 +1591,8 @@ int __init APIC_init_uniprocessor(void)
|
||||||
*/
|
*/
|
||||||
if (!cpu_has_apic &&
|
if (!cpu_has_apic &&
|
||||||
APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
|
APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
|
||||||
printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n",
|
pr_err("BIOS bug, local APIC 0x%x not detected!...\n",
|
||||||
boot_cpu_physical_apicid);
|
boot_cpu_physical_apicid);
|
||||||
clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
|
clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
@ -1699,8 +1685,8 @@ void smp_spurious_interrupt(struct pt_regs *regs)
|
||||||
add_pda(irq_spurious_count, 1);
|
add_pda(irq_spurious_count, 1);
|
||||||
#else
|
#else
|
||||||
/* see sw-dev-man vol 3, chapter 7.4.13.5 */
|
/* see sw-dev-man vol 3, chapter 7.4.13.5 */
|
||||||
printk(KERN_INFO "spurious APIC interrupt on CPU#%d, "
|
pr_info("spurious APIC interrupt on CPU#%d, "
|
||||||
"should never happen.\n", smp_processor_id());
|
"should never happen.\n", smp_processor_id());
|
||||||
__get_cpu_var(irq_stat).irq_spurious_count++;
|
__get_cpu_var(irq_stat).irq_spurious_count++;
|
||||||
#endif
|
#endif
|
||||||
irq_exit();
|
irq_exit();
|
||||||
|
@ -1724,17 +1710,18 @@ void smp_error_interrupt(struct pt_regs *regs)
|
||||||
ack_APIC_irq();
|
ack_APIC_irq();
|
||||||
atomic_inc(&irq_err_count);
|
atomic_inc(&irq_err_count);
|
||||||
|
|
||||||
/* Here is what the APIC error bits mean:
|
/*
|
||||||
0: Send CS error
|
* Here is what the APIC error bits mean:
|
||||||
1: Receive CS error
|
* 0: Send CS error
|
||||||
2: Send accept error
|
* 1: Receive CS error
|
||||||
3: Receive accept error
|
* 2: Send accept error
|
||||||
4: Reserved
|
* 3: Receive accept error
|
||||||
5: Send illegal vector
|
* 4: Reserved
|
||||||
6: Received illegal vector
|
* 5: Send illegal vector
|
||||||
7: Illegal register address
|
* 6: Received illegal vector
|
||||||
*/
|
* 7: Illegal register address
|
||||||
printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n",
|
*/
|
||||||
|
pr_debug("APIC error on CPU%d: %02x(%02x)\n",
|
||||||
smp_processor_id(), v , v1);
|
smp_processor_id(), v , v1);
|
||||||
irq_exit();
|
irq_exit();
|
||||||
}
|
}
|
||||||
|
@ -1838,15 +1825,15 @@ void __cpuinit generic_processor_info(int apicid, int version)
|
||||||
* Validate version
|
* Validate version
|
||||||
*/
|
*/
|
||||||
if (version == 0x0) {
|
if (version == 0x0) {
|
||||||
printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! "
|
pr_warning("BIOS bug, APIC version is 0 for CPU#%d! "
|
||||||
"fixing up to 0x10. (tell your hw vendor)\n",
|
"fixing up to 0x10. (tell your hw vendor)\n",
|
||||||
version);
|
version);
|
||||||
version = 0x10;
|
version = 0x10;
|
||||||
}
|
}
|
||||||
apic_version[apicid] = version;
|
apic_version[apicid] = version;
|
||||||
|
|
||||||
if (num_processors >= NR_CPUS) {
|
if (num_processors >= NR_CPUS) {
|
||||||
printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
|
pr_warning("WARNING: NR_CPUS limit of %i reached."
|
||||||
" Processor ignored.\n", NR_CPUS);
|
" Processor ignored.\n", NR_CPUS);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -2209,7 +2196,7 @@ static int __init apic_set_verbosity(char *arg)
|
||||||
else if (strcmp("verbose", arg) == 0)
|
else if (strcmp("verbose", arg) == 0)
|
||||||
apic_verbosity = APIC_VERBOSE;
|
apic_verbosity = APIC_VERBOSE;
|
||||||
else {
|
else {
|
||||||
printk(KERN_WARNING "APIC Verbosity level %s not recognised"
|
pr_warning("APIC Verbosity level %s not recognised"
|
||||||
" use apic=verbose or apic=debug\n", arg);
|
" use apic=verbose or apic=debug\n", arg);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
|
@ -131,6 +131,11 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
|
||||||
atomic_dec(&nmi_active);
|
atomic_dec(&nmi_active);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void __acpi_nmi_disable(void *__unused)
|
||||||
|
{
|
||||||
|
apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
|
||||||
|
}
|
||||||
|
|
||||||
int __init check_nmi_watchdog(void)
|
int __init check_nmi_watchdog(void)
|
||||||
{
|
{
|
||||||
unsigned int *prev_nmi_count;
|
unsigned int *prev_nmi_count;
|
||||||
|
@ -179,8 +184,12 @@ int __init check_nmi_watchdog(void)
|
||||||
kfree(prev_nmi_count);
|
kfree(prev_nmi_count);
|
||||||
return 0;
|
return 0;
|
||||||
error:
|
error:
|
||||||
if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
|
if (nmi_watchdog == NMI_IO_APIC) {
|
||||||
disable_8259A_irq(0);
|
if (!timer_through_8259)
|
||||||
|
disable_8259A_irq(0);
|
||||||
|
on_each_cpu(__acpi_nmi_disable, NULL, 1);
|
||||||
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_X86_32
|
#ifdef CONFIG_X86_32
|
||||||
timer_ack = 0;
|
timer_ack = 0;
|
||||||
#endif
|
#endif
|
||||||
|
@ -285,11 +294,6 @@ void acpi_nmi_enable(void)
|
||||||
on_each_cpu(__acpi_nmi_enable, NULL, 1);
|
on_each_cpu(__acpi_nmi_enable, NULL, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __acpi_nmi_disable(void *__unused)
|
|
||||||
{
|
|
||||||
apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Disable timer based NMIs on all CPUs:
|
* Disable timer based NMIs on all CPUs:
|
||||||
*/
|
*/
|
||||||
|
@ -340,6 +344,8 @@ void stop_apic_nmi_watchdog(void *unused)
|
||||||
return;
|
return;
|
||||||
if (nmi_watchdog == NMI_LOCAL_APIC)
|
if (nmi_watchdog == NMI_LOCAL_APIC)
|
||||||
lapic_watchdog_stop();
|
lapic_watchdog_stop();
|
||||||
|
else
|
||||||
|
__acpi_nmi_disable(NULL);
|
||||||
__get_cpu_var(wd_enabled) = 0;
|
__get_cpu_var(wd_enabled) = 0;
|
||||||
atomic_dec(&nmi_active);
|
atomic_dec(&nmi_active);
|
||||||
}
|
}
|
||||||
|
@ -465,6 +471,24 @@ nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
|
||||||
|
|
||||||
#ifdef CONFIG_SYSCTL
|
#ifdef CONFIG_SYSCTL
|
||||||
|
|
||||||
|
static void enable_ioapic_nmi_watchdog_single(void *unused)
|
||||||
|
{
|
||||||
|
__get_cpu_var(wd_enabled) = 1;
|
||||||
|
atomic_inc(&nmi_active);
|
||||||
|
__acpi_nmi_enable(NULL);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void enable_ioapic_nmi_watchdog(void)
|
||||||
|
{
|
||||||
|
on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1);
|
||||||
|
touch_nmi_watchdog();
|
||||||
|
}
|
||||||
|
|
||||||
|
static void disable_ioapic_nmi_watchdog(void)
|
||||||
|
{
|
||||||
|
on_each_cpu(stop_apic_nmi_watchdog, NULL, 1);
|
||||||
|
}
|
||||||
|
|
||||||
static int __init setup_unknown_nmi_panic(char *str)
|
static int __init setup_unknown_nmi_panic(char *str)
|
||||||
{
|
{
|
||||||
unknown_nmi_panic = 1;
|
unknown_nmi_panic = 1;
|
||||||
|
@ -507,6 +531,11 @@ int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
|
||||||
enable_lapic_nmi_watchdog();
|
enable_lapic_nmi_watchdog();
|
||||||
else
|
else
|
||||||
disable_lapic_nmi_watchdog();
|
disable_lapic_nmi_watchdog();
|
||||||
|
} else if (nmi_watchdog == NMI_IO_APIC) {
|
||||||
|
if (nmi_watchdog_enabled)
|
||||||
|
enable_ioapic_nmi_watchdog();
|
||||||
|
else
|
||||||
|
disable_ioapic_nmi_watchdog();
|
||||||
} else {
|
} else {
|
||||||
printk(KERN_WARNING
|
printk(KERN_WARNING
|
||||||
"NMI watchdog doesn't know what hardware to touch\n");
|
"NMI watchdog doesn't know what hardware to touch\n");
|
||||||
|
|
Loading…
Reference in New Issue