ath9k_hw: Configure xpa bias level for AR9485
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -3450,9 +3450,15 @@ static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
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static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
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{
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int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
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REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
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REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPABIASLVL_MSB, bias >> 2);
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REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPASHORT2GND, 1);
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if (AR_SREV_9485(ah))
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REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
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else {
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REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
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REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPABIASLVL_MSB,
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bias >> 2);
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REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPASHORT2GND, 1);
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}
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}
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static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
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@ -584,6 +584,10 @@
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#define AR_PHY_65NM_CH2_RXTX1 0x16900
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#define AR_PHY_65NM_CH2_RXTX2 0x16904
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#define AR_CH0_TOP2 (AR_SREV_9485(ah) ? 0x00016284 : 0x0001628c)
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#define AR_CH0_TOP2_XPABIASLVL 0xf000
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#define AR_CH0_TOP2_XPABIASLVL_S 12
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#define AR_PHY_RX1DB_BIQUAD_LONG_SHIFT 0x00380000
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#define AR_PHY_RX1DB_BIQUAD_LONG_SHIFT_S 19
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#define AR_PHY_RX6DB_BIQUAD_LONG_SHIFT 0x00c00000
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