Staging: rtl8192u: r819xU_phy.c - style fix
Fixed style of block comments Found using checkpatch Signed-off-by: Derek Robson <robsonde@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Derek Robson
Greg Kroah-Hartman
parent
415a8e0e77
commit
991397d1c1
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@ -367,7 +367,8 @@ static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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/* Firmware RF Write control.
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* We can not execute the scheme in the initial step.
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* Otherwise, RF-R/W will waste much time.
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* This is only for site survey. */
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* This is only for site survey.
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*/
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/* 1. Read operation need not insert data. bit 0-11 */
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/* 2. Write RF register address. bit 12-19 */
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data |= ((offset&0xFF)<<12);
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@ -380,7 +381,8 @@ static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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read_nic_dword(dev, QPNR, &tmp);
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while (tmp & 0x80000000) {
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/* If FW can not finish RF-R/W for more than ?? times.
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We must reset FW. */
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* We must reset FW.
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*/
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if (time++ < 100) {
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udelay(10);
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read_nic_dword(dev, QPNR, &tmp);
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@ -394,7 +396,8 @@ static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath,
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read_nic_dword(dev, QPNR, &tmp);
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while (tmp & 0x80000000) {
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/* If FW can not finish RF-R/W for more than ?? times.
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We must reset FW. */
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* We must reset FW.
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*/
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if (time++ < 100) {
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udelay(10);
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read_nic_dword(dev, QPNR, &tmp);
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@ -426,7 +429,8 @@ static void phy_FwRFSerialWrite(struct net_device *dev,
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/* Firmware RF Write control.
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* We can not execute the scheme in the initial step.
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* Otherwise, RF-R/W will waste much time.
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* This is only for site survey. */
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* This is only for site survey.
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*/
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/* 1. Set driver write bit and 12 bit data. bit 0-11 */
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/* 2. Write RF register address. bit 12-19 */
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@ -442,7 +446,8 @@ static void phy_FwRFSerialWrite(struct net_device *dev,
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read_nic_dword(dev, QPNR, &tmp);
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while (tmp & 0x80000000) {
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/* If FW can not finish RF-R/W for more than ?? times.
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We must reset FW. */
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* We must reset FW.
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*/
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if (time++ < 100) {
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udelay(10);
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read_nic_dword(dev, QPNR, &tmp);
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@ -451,10 +456,12 @@ static void phy_FwRFSerialWrite(struct net_device *dev,
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}
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}
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/* 7. No matter check bit. We always force the write.
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Because FW will not accept the command. */
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* Because FW will not accept the command.
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*/
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write_nic_dword(dev, QPNR, data);
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/* According to test, we must delay 20us to wait firmware
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to finish RF write operation. */
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* to finish RF write operation.
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*/
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/* We support delay in firmware side now. */
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}
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@ -723,7 +730,8 @@ u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, HW90_BLOCK_E CheckBlock,
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WriteAddr[HW90_BLOCK_RF],
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bMask12Bits, WriteData[i]);
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/* TODO: we should not delay for such a long time.
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Ask SD3 */
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* Ask SD3
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*/
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usleep_range(1000, 1000);
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reg = rtl8192_phy_QueryRFReg(dev, eRFPath,
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WriteAddr[HW90_BLOCK_RF],
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@ -820,7 +828,8 @@ static void rtl8192_BB_Config_ParaFile(struct net_device *dev)
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}
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/* Check if the CCK HighPower is turned ON.
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This is used to calculate PWDB. */
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* This is used to calculate PWDB.
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*/
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priv->bCckHighPower = (u8)rtl8192_QueryBBReg(dev,
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rFPGA0_XA_HSSIParameter2,
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0x200);
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@ -839,7 +848,8 @@ void rtl8192_BBConfig(struct net_device *dev)
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rtl8192_InitBBRFRegDef(dev);
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/* config BB&RF. As hardCode based initialization has not been well
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* implemented, so use file first.
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* FIXME: should implement it for hardcode? */
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* FIXME: should implement it for hardcode?
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*/
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rtl8192_BB_Config_ParaFile(dev);
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}
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@ -1158,7 +1168,8 @@ bool rtl8192_SetRFPowerState(struct net_device *dev,
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switch (pHalData->eRFPowerState) {
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case eRfOff:
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/* If Rf off reason is from IPS,
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LED should blink with no link */
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* LED should blink with no link
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*/
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if (pMgntInfo->RfOffReason == RF_CHANGE_BY_IPS)
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Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_NO_LINK);
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else
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@ -1168,7 +1179,7 @@ bool rtl8192_SetRFPowerState(struct net_device *dev,
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case eRfOn:
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/* Turn on RF we are still linked, which might
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happen when we quickly turn off and on HW RF.
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* happen when we quickly turn off and on HW RF.
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*/
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if (pMgntInfo->bMediaConnect)
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Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_LINK);
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@ -1263,7 +1274,8 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel,
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if (!IsLegalChannel(priv->ieee80211, channel)) {
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RT_TRACE(COMP_ERR, "set to illegal channel: %d\n", channel);
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/* return true to tell upper caller function this channel
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setting is finished! Or it will in while loop. */
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* setting is finished! Or it will in while loop.
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*/
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return true;
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}
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/* FIXME: need to check whether channel is legal or not here */
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@ -1609,7 +1621,8 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev)
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}
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/* Skip over setting of J-mode in BB register here.
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Default value is "None J mode". */
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* Default value is "None J mode".
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*/
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/* <3> Set RF related register */
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switch (priv->rf_chip) {
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