arm64: update linker script to increased L1_CACHE_BYTES value
Bring the linker script in line with the recent increase of L1_CACHE_BYTES to 128. Replace the hardcoded value of 64 with the symbolic constant. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com> [catalin.marinas@arm.com: fix up RW_DATA_SECTION as well] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -5,6 +5,7 @@
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*/
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/cache.h>
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#include <asm/kernel-pgtable.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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@ -140,7 +141,7 @@ SECTIONS
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ARM_EXIT_KEEP(EXIT_DATA)
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}
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PERCPU_SECTION(64)
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PERCPU_SECTION(L1_CACHE_BYTES)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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@ -158,7 +159,7 @@ SECTIONS
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. = ALIGN(PAGE_SIZE);
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_data = .;
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_sdata = .;
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RW_DATA_SECTION(64, PAGE_SIZE, THREAD_SIZE)
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RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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PECOFF_EDATA_PADDING
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_edata = .;
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