iio: adc: ad7292: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: 506d2e317a
("iio: adc: Add driver support for AD7292")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-12-jic23@kernel.org
This commit is contained in:
parent
4e20084295
commit
98295a206d
|
@ -80,7 +80,7 @@ struct ad7292_state {
|
|||
struct regulator *reg;
|
||||
unsigned short vref_mv;
|
||||
|
||||
__be16 d16 ____cacheline_aligned;
|
||||
__be16 d16 __aligned(IIO_DMA_MINALIGN);
|
||||
u8 d8[2];
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue