arch/sparc: Define config parameter CPU_BIG_ENDIAN
Found this problem while enabling queued rwlock on SPARC. The parameter CONFIG_CPU_BIG_ENDIAN is used to clear the specific byte in qrwlock structure. Without this parameter, we clear the wrong byte. Here is the code. static inline u8 *__qrwlock_write_byte(struct qrwlock *lock) { return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN); } Define CPU_BIG_ENDIAN for SPARC to fix it. Signed-off-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com> Reviewed-by: Jane Chu <jane.chu@oracle.com> Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com> Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -92,6 +92,9 @@ config ARCH_DEFCONFIG
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config ARCH_PROC_KCORE_TEXT
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config ARCH_PROC_KCORE_TEXT
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def_bool y
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def_bool y
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config CPU_BIG_ENDIAN
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def_bool y
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config ARCH_ATU
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config ARCH_ATU
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bool
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bool
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default y if SPARC64
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default y if SPARC64
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