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linux-sg2042
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Merge branch 'work/old-omapfb-removal'

This commit is contained in:
Tomi Valkeinen 2012-02-23 09:45:58 +02:00
parent f15511e23d ae7e1f2d0b
commit 973b659cbf
35 changed files with 101 additions and 4633 deletions
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9
arch/arm/mach-omap1/board-ams-delta.c
View File

@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/export.h>
#include <linux/omapfb.h>
#include <media/soc_camera.h>
@ -169,10 +170,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
.pins[0] = 2,
};
static struct omap_board_config_kernel ams_delta_config[] __initdata = {
{ OMAP_TAG_LCD, &ams_delta_lcd_config },
};
static struct resource ams_delta_nand_resources[] = {
[0] = {
.start = OMAP1_MPUIO_BASE,
@ -302,8 +299,6 @@ static void __init ams_delta_init(void)
omap_cfg_reg(J19_1610_CAM_D6);
omap_cfg_reg(J18_1610_CAM_D7);
omap_board_config = ams_delta_config;
omap_board_config_size = ARRAY_SIZE(ams_delta_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
@ -321,6 +316,8 @@ static void __init ams_delta_init(void)
ams_delta_init_fiq();
omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
omapfb_set_lcd_config(&ams_delta_lcd_config);
}
static struct plat_serial8250_port ams_delta_modem_ports[] = {

15
arch/arm/mach-omap1/board-fsample.c
View File

@ -21,6 +21,7 @@
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -273,27 +274,17 @@ static struct platform_device kp_device = {
.resource = kp_resources,
};
static struct platform_device lcd_device = {
.name = "lcd_p2",
.id = -1,
};
static struct platform_device *devices[] __initdata = {
&nor_device,
&nand_device,
&smc91x_device,
&kp_device,
&lcd_device,
};
static struct omap_lcd_config fsample_lcd_config = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel fsample_config[] __initdata = {
{ OMAP_TAG_LCD, &fsample_lcd_config },
};
static void __init omap_fsample_init(void)
{
/* Early, board-dependent init */
@ -352,10 +343,10 @@ static void __init omap_fsample_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_board_config = fsample_config;
omap_board_config_size = ARRAY_SIZE(fsample_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&fsample_lcd_config);
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */

15
arch/arm/mach-omap1/board-h2.c
View File

@ -30,6 +30,7 @@
#include <linux/input.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
@ -325,18 +326,12 @@ static struct platform_device h2_irda_device = {
.resource = h2_irda_resources,
};
static struct platform_device h2_lcd_device = {
.name = "lcd_h2",
.id = -1,
};
static struct platform_device *h2_devices[] __initdata = {
&h2_nor_device,
&h2_nand_device,
&h2_smc91x_device,
&h2_irda_device,
&h2_kp_device,
&h2_lcd_device,
};
static void __init h2_init_smc91x(void)
@ -391,10 +386,6 @@ static struct omap_lcd_config h2_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel h2_config[] __initdata = {
{ OMAP_TAG_LCD, &h2_lcd_config },
};
static void __init h2_init(void)
{
h2_init_smc91x();
@ -438,13 +429,13 @@ static void __init h2_init(void)
omap_cfg_reg(N19_1610_KBR5);
platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
omap_board_config = h2_config;
omap_board_config_size = ARRAY_SIZE(h2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h2_i2c_board_info,
ARRAY_SIZE(h2_i2c_board_info));
omap1_usb_init(&h2_usb_config);
h2_mmc_init();
omapfb_set_lcd_config(&h2_lcd_config);
}
MACHINE_START(OMAP_H2, "TI-H2")

9
arch/arm/mach-omap1/board-h3.c
View File

@ -30,6 +30,7 @@
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <asm/setup.h>
#include <asm/page.h>
@ -370,10 +371,6 @@ static struct omap_lcd_config h3_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel h3_config[] __initdata = {
{ OMAP_TAG_LCD, &h3_lcd_config },
};
static struct i2c_board_info __initdata h3_i2c_board_info[] = {
{
I2C_BOARD_INFO("tps65013", 0x48),
@ -426,13 +423,13 @@ static void __init h3_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
spi_register_board_info(h3_spi_board_info,
ARRAY_SIZE(h3_spi_board_info));
omap_board_config = h3_config;
omap_board_config_size = ARRAY_SIZE(h3_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h3_i2c_board_info,
ARRAY_SIZE(h3_i2c_board_info));
omap1_usb_init(&h3_usb_config);
h3_mmc_init();
omapfb_set_lcd_config(&h3_lcd_config);
}
MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")

9
arch/arm/mach-omap1/board-htcherald.c
View File

@ -36,6 +36,7 @@
#include <linux/leds.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/omapfb.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -398,10 +399,6 @@ static struct omap_lcd_config htcherald_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel htcherald_config[] __initdata = {
{ OMAP_TAG_LCD, &htcherald_lcd_config },
};
static struct platform_device lcd_device = {
.name = "lcd_htcherald",
.id = -1,
@ -580,8 +577,6 @@ static void __init htcherald_init(void)
printk(KERN_INFO "HTC Herald init.\n");
/* Do board initialization before we register all the devices */
omap_board_config = htcherald_config;
omap_board_config_size = ARRAY_SIZE(htcherald_config);
platform_add_devices(devices, ARRAY_SIZE(devices));
htcherald_disable_watchdog();
@ -598,6 +593,8 @@ static void __init htcherald_init(void)
htc_mmc_data[0] = &htc_mmc1_data;
omap1_init_mmc(htc_mmc_data, 1);
#endif
omapfb_set_lcd_config(&htcherald_lcd_config);
}
MACHINE_START(HERALD, "HTC Herald")

11
arch/arm/mach-omap1/board-innovator.c
View File

@ -25,6 +25,7 @@
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -370,10 +371,6 @@ static inline void innovator_mmc_init(void)
}
#endif
static struct omap_board_config_kernel innovator_config[] = {
{ OMAP_TAG_LCD, NULL },
};
static void __init innovator_init(void)
{
if (cpu_is_omap1510())
@ -416,17 +413,15 @@ static void __init innovator_init(void)
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
omap1_usb_init(&innovator1510_usb_config);
innovator_config[1].data = &innovator1510_lcd_config;
omapfb_set_lcd_config(&innovator1510_lcd_config);
}
#endif
#ifdef CONFIG_ARCH_OMAP16XX
if (cpu_is_omap1610()) {
omap1_usb_init(&h2_usb_config);
innovator_config[1].data = &innovator1610_lcd_config;
omapfb_set_lcd_config(&innovator1610_lcd_config);
}
#endif
omap_board_config = innovator_config;
omap_board_config_size = ARRAY_SIZE(innovator_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
innovator_mmc_init();

19
arch/arm/mach-omap1/board-nokia770.c
View File

@ -31,7 +31,6 @@
#include <plat/board.h>
#include <plat/keypad.h>
#include "common.h"
#include <plat/hwa742.h>
#include <plat/lcd_mipid.h>
#include <plat/mmc.h>
#include <plat/clock.h>
@ -99,15 +98,16 @@ static struct mipid_platform_data nokia770_mipid_platform_data = {
.shutdown = mipid_shutdown,
};
static struct omap_lcd_config nokia770_lcd_config __initdata = {
.ctrl_name = "hwa742",
};
static void __init mipid_dev_init(void)
{
const struct omap_lcd_config *conf;
nokia770_mipid_platform_data.nreset_gpio = 13;
nokia770_mipid_platform_data.data_lines = 16;
conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
if (conf != NULL) {
nokia770_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
nokia770_mipid_platform_data.data_lines = conf->data_lines;
}
omapfb_set_lcd_config(&nokia770_lcd_config);
}
static void __init ads7846_dev_init(void)
@ -150,14 +150,9 @@ static struct spi_board_info nokia770_spi_board_info[] __initdata = {
},
};
static struct hwa742_platform_data nokia770_hwa742_platform_data = {
.te_connected = 1,
};
static void __init hwa742_dev_init(void)
{
clk_add_alias("hwa_sys_ck", NULL, "bclk", NULL);
omapfb_set_ctrl_platform_data(&nokia770_hwa742_platform_data);
}
/* assume no Mini-AB port */

14
arch/arm/mach-omap1/board-osk.c
View File

@ -34,6 +34,7 @@
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
@ -300,12 +301,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = {
};
#endif
static struct omap_board_config_kernel osk_config[] __initdata = {
#ifdef CONFIG_OMAP_OSK_MISTRAL
{ OMAP_TAG_LCD, &osk_lcd_config },
#endif
};
#ifdef CONFIG_OMAP_OSK_MISTRAL
#include <linux/input.h>
@ -549,8 +544,6 @@ static void __init osk_init(void)
osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys();
osk_flash_resource.end += SZ_32M - 1;
platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices));
omap_board_config = osk_config;
omap_board_config_size = ARRAY_SIZE(osk_config);
l = omap_readl(USB_TRANSCEIVER_CTRL);
l |= (3 << 1);
@ -567,6 +560,11 @@ static void __init osk_init(void)
omap_register_i2c_bus(1, 400, osk_i2c_board_info,
ARRAY_SIZE(osk_i2c_board_info));
osk_mistral_init();
#ifdef CONFIG_OMAP_OSK_MISTRAL
omapfb_set_lcd_config(&osk_lcd_config);
#endif
}
MACHINE_START(OMAP_OSK, "TI-OSK")

10
arch/arm/mach-omap1/board-palmte.c
View File

@ -27,6 +27,7 @@
#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/apm-emulation.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -209,10 +210,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel palmte_config[] __initdata = {
{ OMAP_TAG_LCD, &palmte_lcd_config },
};
static struct spi_board_info palmte_spi_info[] __initdata = {
{
.modalias = "tsc2102",
@ -250,9 +247,6 @@ static void __init omap_palmte_init(void)
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
omap_board_config = palmte_config;
omap_board_config_size = ARRAY_SIZE(palmte_config);
platform_add_devices(palmte_devices, ARRAY_SIZE(palmte_devices));
spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info));
@ -260,6 +254,8 @@ static void __init omap_palmte_init(void)
omap_serial_init();
omap1_usb_init(&palmte_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&palmte_lcd_config);
}
MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")

10
arch/arm/mach-omap1/board-palmtt.c
View File

@ -24,6 +24,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/leds.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -273,10 +274,6 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel palmtt_config[] __initdata = {
{ OMAP_TAG_LCD, &palmtt_lcd_config },
};
static void __init omap_mpu_wdt_mode(int mode) {
if (mode)
omap_writew(0x8000, OMAP_WDT_TIMER_MODE);
@ -298,15 +295,14 @@ static void __init omap_palmtt_init(void)
omap_mpu_wdt_mode(0);
omap_board_config = palmtt_config;
omap_board_config_size = ARRAY_SIZE(palmtt_config);
platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices));
spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo));
omap_serial_init();
omap1_usb_init(&palmtt_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&palmtt_lcd_config);
}
MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")

10
arch/arm/mach-omap1/board-palmz71.c
View File

@ -27,6 +27,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -239,10 +240,6 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel palmz71_config[] __initdata = {
{OMAP_TAG_LCD, &palmz71_lcd_config},
};
static irqreturn_t
palmz71_powercable(int irq, void *dev_id)
{
@ -313,9 +310,6 @@ omap_palmz71_init(void)
palmz71_gpio_setup(1);
omap_mpu_wdt_mode(0);
omap_board_config = palmz71_config;
omap_board_config_size = ARRAY_SIZE(palmz71_config);
platform_add_devices(devices, ARRAY_SIZE(devices));
spi_register_board_info(palmz71_boardinfo,
@ -324,6 +318,8 @@ omap_palmz71_init(void)
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
palmz71_gpio_setup(0);
omapfb_set_lcd_config(&palmz71_lcd_config);
}
MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")

15
arch/arm/mach-omap1/board-perseus2.c
View File

@ -21,6 +21,7 @@
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -232,27 +233,17 @@ static struct platform_device kp_device = {
.resource = kp_resources,
};
static struct platform_device lcd_device = {
.name = "lcd_p2",
.id = -1,
};
static struct platform_device *devices[] __initdata = {
&nor_device,
&nand_device,
&smc91x_device,
&kp_device,
&lcd_device,
};
static struct omap_lcd_config perseus2_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel perseus2_config[] __initdata = {
{ OMAP_TAG_LCD, &perseus2_lcd_config },
};
static void __init perseus2_init_smc91x(void)
{
fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
@ -320,10 +311,10 @@ static void __init omap_perseus2_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_board_config = perseus2_config;
omap_board_config_size = ARRAY_SIZE(perseus2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omapfb_set_lcd_config(&perseus2_lcd_config);
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */

16
arch/arm/mach-omap1/board-sx1.c
View File

@ -27,6 +27,7 @@
#include <linux/i2c.h>
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/omapfb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -355,11 +356,6 @@ static struct omap_usb_config sx1_usb_config __initdata = {
/*----------- LCD -------------------------*/
static struct platform_device sx1_lcd_device = {
.name = "lcd_sx1",
.id = -1,
};
static struct omap_lcd_config sx1_lcd_config __initdata = {
.ctrl_name = "internal",
};
@ -368,14 +364,8 @@ static struct omap_lcd_config sx1_lcd_config __initdata = {
static struct platform_device *sx1_devices[] __initdata = {
&sx1_flash_device,
&sx1_kp_device,
&sx1_lcd_device,
&sx1_irda_device,
};
/*-----------------------------------------*/
static struct omap_board_config_kernel sx1_config[] __initdata = {
{ OMAP_TAG_LCD, &sx1_lcd_config },
};
/*-----------------------------------------*/
@ -391,8 +381,6 @@ static void __init omap_sx1_init(void)
platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices));
omap_board_config = sx1_config;
omap_board_config_size = ARRAY_SIZE(sx1_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omap1_usb_init(&sx1_usb_config);
@ -406,6 +394,8 @@ static void __init omap_sx1_init(void)
gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */
gpio_direction_output(11, 0); /*A_SWITCH = 0 */
gpio_direction_output(15, 0); /*A_USB_ON = 0 */
omapfb_set_lcd_config(&sx1_lcd_config);
}
MACHINE_START(SX1, "OMAP310 based Siemens SX1")

1
arch/arm/mach-omap2/io.c
View File

@ -21,7 +21,6 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/omapfb.h>
#include <asm/tlb.h>

2
arch/arm/plat-omap/common.c
View File

@ -15,7 +15,6 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/omapfb.h>
#include <plat/common.h>
#include <plat/board.h>
@ -65,7 +64,6 @@ const void *__init omap_get_var_config(u16 tag, size_t *len)
void __init omap_reserve(void)
{
omapfb_reserve_sdram_memblock();
omap_vram_reserve_sdram_memblock();
omap_dsp_reserve_sdram_memblock();
omap_secure_ram_reserve_memblock();

338
arch/arm/plat-omap/fb.c
View File

@ -34,15 +34,11 @@
#include <asm/mach/map.h>
#include <plat/board.h>
#include <plat/sram.h>
#include "fb.h"
#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
static bool omapfb_lcd_configured;
static struct omapfb_platform_data omapfb_config;
static int config_invalid;
static int configured_regions;
static u64 omap_fb_dma_mask = ~(u32)0;
@ -57,301 +53,20 @@ static struct platform_device omap_fb_device = {
.num_resources = 0,
};
void omapfb_set_platform_data(struct omapfb_platform_data *data)
void __init omapfb_set_lcd_config(const struct omap_lcd_config *config)
{
}
static inline int ranges_overlap(unsigned long start1, unsigned long size1,
unsigned long start2, unsigned long size2)
{
return (start1 >= start2 && start1 < start2 + size2) ||
(start2 >= start1 && start2 < start1 + size1);
}
static inline int range_included(unsigned long start1, unsigned long size1,
unsigned long start2, unsigned long size2)
{
return start1 >= start2 && start1 + size1 <= start2 + size2;
}
/* Check if there is an overlapping region. */
static int fbmem_region_reserved(unsigned long start, size_t size)
{
struct omapfb_mem_region *rg;
int i;
rg = &omapfb_config.mem_desc.region[0];
for (i = 0; i < OMAPFB_PLANE_NUM; i++, rg++) {
if (!rg->paddr)
/* Empty slot. */
continue;
if (ranges_overlap(start, size, rg->paddr, rg->size))
return 1;
}
return 0;
}
/*
* Get the region_idx`th region from board config/ATAG and convert it to
* our internal format.
*/
static int __init get_fbmem_region(int region_idx, struct omapfb_mem_region *rg)
{
const struct omap_fbmem_config *conf;
u32 paddr;
conf = omap_get_nr_config(OMAP_TAG_FBMEM,
struct omap_fbmem_config, region_idx);
if (conf == NULL)
return -ENOENT;
paddr = conf->start;
/*
* Low bits encode the page allocation mode, if high bits
* are zero. Otherwise we need a page aligned fixed
* address.
*/
memset(rg, 0, sizeof(*rg));
rg->type = paddr & ~PAGE_MASK;
rg->paddr = paddr & PAGE_MASK;
rg->size = PAGE_ALIGN(conf->size);
return 0;
}
static int set_fbmem_region_type(struct omapfb_mem_region *rg, int mem_type,
unsigned long mem_start,
unsigned long mem_size)
{
/*
* Check if the configuration specifies the type explicitly.
* type = 0 && paddr = 0, a default don't care case maps to
* the SDRAM type.
*/
if (rg->type || !rg->paddr)
return 0;
if (ranges_overlap(rg->paddr, rg->size, mem_start, mem_size)) {
rg->type = mem_type;
return 0;
}
/* Can't determine it. */
return -1;
}
static int check_fbmem_region(int region_idx, struct omapfb_mem_region *rg,
unsigned long start_avail, unsigned size_avail)
{
unsigned long paddr = rg->paddr;
size_t size = rg->size;
if (rg->type > OMAPFB_MEMTYPE_MAX) {
printk(KERN_ERR
"Invalid start address for FB region %d\n", region_idx);
return -EINVAL;
}
if (!rg->size) {
printk(KERN_ERR "Zero size for FB region %d\n", region_idx);
return -EINVAL;
}
if (!paddr)
/* Allocate this dynamically, leave paddr 0 for now. */
return 0;
/*
* Fixed region for the given RAM range. Check if it's already
* reserved by the FB code or someone else.
*/
if (fbmem_region_reserved(paddr, size) ||
!range_included(paddr, size, start_avail, size_avail)) {
printk(KERN_ERR "Trying to use reserved memory "
"for FB region %d\n", region_idx);
return -EINVAL;
}
return 0;
}
static int valid_sdram(unsigned long addr, unsigned long size)
{
return memblock_is_region_memory(addr, size);
}
static int reserve_sdram(unsigned long addr, unsigned long size)
{
if (memblock_is_region_reserved(addr, size))
return -EBUSY;
if (memblock_reserve(addr, size))
return -ENOMEM;
return 0;
}
/*
* Called from map_io. We need to call to this early enough so that we
* can reserve the fixed SDRAM regions before VM could get hold of them.
*/
void __init omapfb_reserve_sdram_memblock(void)
{
unsigned long reserved = 0;
int i;
if (config_invalid)
return;
for (i = 0; ; i++) {
struct omapfb_mem_region rg;
if (get_fbmem_region(i, &rg) < 0)
break;
if (i == OMAPFB_PLANE_NUM) {
pr_err("Extraneous FB mem configuration entries\n");
config_invalid = 1;
return;
}
/* Check if it's our memory type. */
if (rg.type != OMAPFB_MEMTYPE_SDRAM)
continue;
/* Check if the region falls within SDRAM */
if (rg.paddr && !valid_sdram(rg.paddr, rg.size))
continue;
if (rg.size == 0) {
pr_err("Zero size for FB region %d\n", i);
config_invalid = 1;
return;
}
if (rg.paddr) {
if (reserve_sdram(rg.paddr, rg.size)) {
pr_err("Trying to use reserved memory for FB region %d\n",
i);
config_invalid = 1;
return;
}
reserved += rg.size;
}
if (omapfb_config.mem_desc.region[i].size) {
pr_err("FB region %d already set\n", i);
config_invalid = 1;
return;
}
omapfb_config.mem_desc.region[i] = rg;
configured_regions++;
}
omapfb_config.mem_desc.region_cnt = i;
if (reserved)
pr_info("Reserving %lu bytes SDRAM for frame buffer\n",
reserved);
}
/*
* Called at sram init time, before anything is pushed to the SRAM stack.
* Because of the stack scheme, we will allocate everything from the
* start of the lowest address region to the end of SRAM. This will also
* include padding for page alignment and possible holes between regions.
*
* As opposed to the SDRAM case, we'll also do any dynamic allocations at
* this point, since the driver built as a module would have problem with
* freeing / reallocating the regions.
*/
unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail)
{
struct omapfb_mem_region rg;
unsigned long pend_avail;
unsigned long reserved;
int i;
if (config_invalid)
return 0;
reserved = 0;
pend_avail = pstart_avail + size_avail;
for (i = 0; ; i++) {
if (get_fbmem_region(i, &rg) < 0)
break;
if (i == OMAPFB_PLANE_NUM) {
printk(KERN_ERR
"Extraneous FB mem configuration entries\n");
config_invalid = 1;
return 0;
}
/* Check if it's our memory type. */
if (set_fbmem_region_type(&rg, OMAPFB_MEMTYPE_SRAM,
sram_pstart, sram_size) < 0 ||
(rg.type != OMAPFB_MEMTYPE_SRAM))
continue;
BUG_ON(omapfb_config.mem_desc.region[i].size);
if (check_fbmem_region(i, &rg, pstart_avail, size_avail) < 0) {
config_invalid = 1;
return 0;
}
if (!rg.paddr) {
/* Dynamic allocation */
if ((size_avail & PAGE_MASK) < rg.size) {
printk("Not enough SRAM for FB region %d\n",
i);
config_invalid = 1;
return 0;
}
size_avail = (size_avail - rg.size) & PAGE_MASK;
rg.paddr = pstart_avail + size_avail;
}
/* Reserve everything above the start of the region. */
if (pend_avail - rg.paddr > reserved)
reserved = pend_avail - rg.paddr;
size_avail = pend_avail - reserved - pstart_avail;
/*
* We have a kernel mapping for this already, so the
* driver won't have to make one.
*/
rg.vaddr = (void *)(sram_vstart + rg.paddr - sram_pstart);
omapfb_config.mem_desc.region[i] = rg;
configured_regions++;
}
omapfb_config.mem_desc.region_cnt = i;
if (reserved)
pr_info("Reserving %lu bytes SRAM for frame buffer\n",
reserved);
return reserved;
}
void omapfb_set_ctrl_platform_data(void *data)
{
omapfb_config.ctrl_platform_data = data;
omapfb_config.lcd = *config;
omapfb_lcd_configured = true;
}
static int __init omap_init_fb(void)
{
const struct omap_lcd_config *conf;
if (config_invalid)
/*
* If the board file has not set the lcd config with
* omapfb_set_lcd_config(), don't bother registering the omapfb device
*/
if (!omapfb_lcd_configured)
return 0;
if (configured_regions != omapfb_config.mem_desc.region_cnt) {
printk(KERN_ERR "Invalid FB mem configuration entries\n");
return 0;
}
conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
if (conf == NULL) {
if (configured_regions)
/* FB mem config, but no LCD config? */
printk(KERN_ERR "Missing LCD configuration\n");
return 0;
}
omapfb_config.lcd = *conf;
return platform_device_register(&omap_fb_device);
}
@ -374,11 +89,6 @@ static struct platform_device omap_fb_device = {
.num_resources = 0,
};
void omapfb_set_platform_data(struct omapfb_platform_data *data)
{
omapfb_config = *data;
}
static int __init omap_init_fb(void)
{
return platform_device_register(&omap_fb_device);
@ -386,36 +96,8 @@ static int __init omap_init_fb(void)
arch_initcall(omap_init_fb);
void omapfb_reserve_sdram_memblock(void)
{
}
unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long start_avail,
unsigned long size_avail)
{
return 0;
}
#else
void omapfb_set_platform_data(struct omapfb_platform_data *data)
{
}
void omapfb_reserve_sdram_memblock(void)
{
}
unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long start_avail,
unsigned long size_avail)
{
return 0;
}
void __init omapfb_set_lcd_config(omap_lcd_config *config) { }
#endif

10
arch/arm/plat-omap/fb.h
View File

@ -1,10 +0,0 @@
#ifndef __PLAT_OMAP_FB_H__
#define __PLAT_OMAP_FB_H__
extern unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail);
#endif /* __PLAT_OMAP_FB_H__ */

12
arch/arm/plat-omap/include/plat/blizzard.h
View File

@ -1,12 +0,0 @@
#ifndef _BLIZZARD_H
#define _BLIZZARD_H
struct blizzard_platform_data {
void (*power_up)(struct device *dev);
void (*power_down)(struct device *dev);
unsigned long (*get_clock_rate)(struct device *dev);
unsigned te_connected:1;
};
#endif

2
arch/arm/plat-omap/include/plat/board.h
View File

@ -28,9 +28,7 @@ enum {
/* Different peripheral ids */
#define OMAP_TAG_CLOCK 0x4f01
#define OMAP_TAG_LCD 0x4f05
#define OMAP_TAG_GPIO_SWITCH 0x4f06
#define OMAP_TAG_FBMEM 0x4f08
#define OMAP_TAG_STI_CONSOLE 0x4f09
#define OMAP_TAG_CAMERA_SENSOR 0x4f0a

8
arch/arm/plat-omap/include/plat/hwa742.h
View File

@ -1,8 +0,0 @@
#ifndef _HWA742_H
#define _HWA742_H
struct hwa742_platform_data {
unsigned te_connected:1;
};
#endif

21
arch/arm/plat-omap/include/plat/vram.h
View File

@ -23,40 +23,21 @@
#include <linux/types.h>
#define OMAP_VRAM_MEMTYPE_SDRAM 0
#define OMAP_VRAM_MEMTYPE_SRAM 1
#define OMAP_VRAM_MEMTYPE_MAX 1
extern int omap_vram_add_region(unsigned long paddr, size_t size);
extern int omap_vram_free(unsigned long paddr, size_t size);
extern int omap_vram_alloc(int mtype, size_t size, unsigned long *paddr);
extern int omap_vram_alloc(size_t size, unsigned long *paddr);
extern int omap_vram_reserve(unsigned long paddr, size_t size);
extern void omap_vram_get_info(unsigned long *vram, unsigned long *free_vram,
unsigned long *largest_free_block);
#ifdef CONFIG_OMAP2_VRAM
extern void omap_vram_set_sdram_vram(u32 size, u32 start);
extern void omap_vram_set_sram_vram(u32 size, u32 start);
extern void omap_vram_reserve_sdram_memblock(void);
extern unsigned long omap_vram_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail);
#else
static inline void omap_vram_set_sdram_vram(u32 size, u32 start) { }
static inline void omap_vram_set_sram_vram(u32 size, u32 start) { }
static inline void omap_vram_reserve_sdram_memblock(void) { }
static inline unsigned long omap_vram_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail)
{
return 0;
}
#endif
#endif

16
drivers/video/omap/Kconfig
View File

@ -1,11 +1,10 @@
config FB_OMAP
tristate "OMAP frame buffer support (EXPERIMENTAL)"
depends on FB && (OMAP2_DSS = "n")
depends on ARCH_OMAP1 || ARCH_OMAP2 || ARCH_OMAP3
depends on FB
depends on ARCH_OMAP1
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select TWL4030_CORE if MACH_OMAP_2430SDP
help
Frame buffer driver for OMAP based boards.
@ -23,13 +22,6 @@ config FB_OMAP_LCDC_HWA742
Say Y here if you want to have support for the external
Epson HWA742 LCD controller.
config FB_OMAP_LCDC_BLIZZARD
bool "Epson Blizzard LCD controller support"
depends on FB_OMAP && FB_OMAP_LCDC_EXTERNAL
help
Say Y here if you want to have support for the external
Epson Blizzard LCD controller.
config FB_OMAP_MANUAL_UPDATE
bool "Default to manual update mode"
depends on FB_OMAP && FB_OMAP_LCDC_EXTERNAL
@ -49,7 +41,7 @@ config FB_OMAP_LCD_MIPID
config FB_OMAP_BOOTLOADER_INIT
bool "Check bootloader initialization"
depends on FB_OMAP || FB_OMAP2
depends on FB_OMAP
help
Say Y here if you want to enable checking if the bootloader has
already initialized the display controller. In this case the
@ -68,7 +60,7 @@ config FB_OMAP_CONSISTENT_DMA_SIZE
config FB_OMAP_DMA_TUNE
bool "Set DMA SDRAM access priority high"
depends on FB_OMAP && ARCH_OMAP1
depends on FB_OMAP
help
On systems in which video memory is in system memory
(SDRAM) this will speed up graphics DMA operations.

12
drivers/video/omap/Makefile
View File

@ -1,20 +1,14 @@
#
# Makefile for the new OMAP framebuffer device driver
# Makefile for the OMAP1 framebuffer device driver
#
obj-$(CONFIG_FB_OMAP) += omapfb.o
objs-yy := omapfb_main.o
objs-yy := omapfb_main.o lcdc.o
objs-y$(CONFIG_ARCH_OMAP1) += lcdc.o
objs-y$(CONFIG_ARCH_OMAP2) += dispc.o
objs-y$(CONFIG_ARCH_OMAP3) += dispc.o
objs-$(CONFIG_ARCH_OMAP1)$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += sossi.o
objs-$(CONFIG_ARCH_OMAP2)$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += rfbi.o
objs-y$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += sossi.o
objs-y$(CONFIG_FB_OMAP_LCDC_HWA742) += hwa742.o
objs-y$(CONFIG_FB_OMAP_LCDC_BLIZZARD) += blizzard.o
objs-y$(CONFIG_MACH_AMS_DELTA) += lcd_ams_delta.o
objs-y$(CONFIG_MACH_OMAP_H3) += lcd_h3.o

1648
drivers/video/omap/blizzard.c
View File

File diff suppressed because it is too large Load Diff

1547
drivers/video/omap/dispc.c
View File

File diff suppressed because it is too large Load Diff

46
drivers/video/omap/dispc.h
View File

@ -1,46 +0,0 @@
#ifndef _DISPC_H
#define _DISPC_H
#include <linux/interrupt.h>
#define DISPC_PLANE_GFX 0
#define DISPC_PLANE_VID1 1
#define DISPC_PLANE_VID2 2
#define DISPC_RGB_1_BPP 0x00
#define DISPC_RGB_2_BPP 0x01
#define DISPC_RGB_4_BPP 0x02
#define DISPC_RGB_8_BPP 0x03
#define DISPC_RGB_12_BPP 0x04
#define DISPC_RGB_16_BPP 0x06
#define DISPC_RGB_24_BPP 0x08
#define DISPC_RGB_24_BPP_UNPACK_32 0x09
#define DISPC_YUV2_422 0x0a
#define DISPC_UYVY_422 0x0b
#define DISPC_BURST_4x32 0
#define DISPC_BURST_8x32 1
#define DISPC_BURST_16x32 2
#define DISPC_LOAD_CLUT_AND_FRAME 0x00
#define DISPC_LOAD_CLUT_ONLY 0x01
#define DISPC_LOAD_FRAME_ONLY 0x02
#define DISPC_LOAD_CLUT_ONCE_FRAME 0x03
#define DISPC_TFT_DATA_LINES_12 0
#define DISPC_TFT_DATA_LINES_16 1
#define DISPC_TFT_DATA_LINES_18 2
#define DISPC_TFT_DATA_LINES_24 3
extern void omap_dispc_set_lcd_size(int width, int height);
extern void omap_dispc_enable_lcd_out(int enable);
extern void omap_dispc_enable_digit_out(int enable);
extern int omap_dispc_request_irq(unsigned long irq_mask,
void (*callback)(void *data), void *data);
extern void omap_dispc_free_irq(unsigned long irq_mask,
void (*callback)(void *data), void *data);
extern const struct lcd_ctrl omap2_int_ctrl;
#endif

21
drivers/video/omap/hwa742.c
View File

@ -28,7 +28,6 @@
#include <linux/interrupt.h>
#include <plat/dma.h>
#include <plat/hwa742.h>
#include "omapfb.h"
#define HWA742_REV_CODE_REG 0x0
@ -942,7 +941,6 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode,
unsigned long sys_clk, pix_clk;
int extif_mem_div;
struct omapfb_platform_data *omapfb_conf;
struct hwa742_platform_data *ctrl_conf;
BUG_ON(!fbdev->ext_if || !fbdev->int_ctrl);
@ -951,13 +949,6 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode,
hwa742.int_ctrl = fbdev->int_ctrl;
omapfb_conf = fbdev->dev->platform_data;
ctrl_conf = omapfb_conf->ctrl_platform_data;
if (ctrl_conf == NULL) {
dev_err(fbdev->dev, "HWA742: missing platform data\n");
r = -ENOENT;
goto err1;
}
hwa742.sys_ck = clk_get(NULL, "hwa_sys_ck");
@ -995,14 +986,12 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode,
goto err4;
}
if (ctrl_conf->te_connected) {
if ((r = setup_tearsync(pix_clk, extif_mem_div)) < 0) {
dev_err(hwa742.fbdev->dev,
"HWA742: can't setup tearing synchronization\n");
goto err4;
}
hwa742.te_connected = 1;
if ((r = setup_tearsync(pix_clk, extif_mem_div)) < 0) {
dev_err(hwa742.fbdev->dev,
"HWA742: can't setup tearing synchronization\n");
goto err4;
}
hwa742.te_connected = 1;
hwa742.max_transmit_size = hwa742.extif->max_transmit_size;

25
drivers/video/omap/omapfb.h
View File

@ -47,6 +47,27 @@
struct omapfb_device;
#define OMAPFB_PLANE_NUM 1
struct omapfb_mem_region {
u32 paddr;
void __iomem *vaddr;
unsigned long size;
u8 type; /* OMAPFB_PLANE_MEM_* */
enum omapfb_color_format format;/* OMAPFB_COLOR_* */
unsigned format_used:1; /* Must be set when format is set.
* Needed b/c of the badly chosen 0
* base for OMAPFB_COLOR_* values
*/
unsigned alloc:1; /* allocated by the driver */
unsigned map:1; /* kernel mapped by the driver */
};
struct omapfb_mem_desc {
int region_cnt;
struct omapfb_mem_region region[OMAPFB_PLANE_NUM];
};
struct lcd_panel {
const char *name;
int config; /* TFT/STN, signal inversion */
@ -207,11 +228,7 @@ struct omapfb_device {
struct platform_device *dssdev; /* dummy dev for clocks */
};
#ifdef CONFIG_ARCH_OMAP1
extern struct lcd_ctrl omap1_lcd_ctrl;
#else
extern struct lcd_ctrl omap2_disp_ctrl;
#endif
extern void omapfb_register_panel(struct lcd_panel *panel);
extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval);

30
drivers/video/omap/omapfb_main.c
View File

@ -34,7 +34,6 @@
#include "omapfb.h"
#include "lcdc.h"
#include "dispc.h"
#define MODULE_NAME "omapfb"
@ -104,29 +103,17 @@ static struct platform_device omapdss_device = {
* ---------------------------------------------------------------------------
*/
extern struct lcd_ctrl hwa742_ctrl;
extern struct lcd_ctrl blizzard_ctrl;
static const struct lcd_ctrl *ctrls[] = {
#ifdef CONFIG_ARCH_OMAP1
&omap1_int_ctrl,
#else
&omap2_int_ctrl,
#endif
#ifdef CONFIG_FB_OMAP_LCDC_HWA742
&hwa742_ctrl,
#endif
#ifdef CONFIG_FB_OMAP_LCDC_BLIZZARD
&blizzard_ctrl,
#endif
};
#ifdef CONFIG_FB_OMAP_LCDC_EXTERNAL
#ifdef CONFIG_ARCH_OMAP1
extern struct lcd_ctrl_extif omap1_ext_if;
#else
extern struct lcd_ctrl_extif omap2_ext_if;
#endif
#endif
static void omapfb_rqueue_lock(struct omapfb_device *fbdev)
@ -170,11 +157,6 @@ static int ctrl_init(struct omapfb_device *fbdev)
fbdev->mem_desc.region[i].size =
PAGE_ALIGN(def_vram[i]);
fbdev->mem_desc.region_cnt = i;
} else {
struct omapfb_platform_data *conf;
conf = fbdev->dev->platform_data;
fbdev->mem_desc = conf->mem_desc;
}
if (!fbdev->mem_desc.region_cnt) {
@ -880,7 +862,7 @@ static int omapfb_setup_mem(struct fb_info *fbi, struct omapfb_mem_info *mi)
if (fbdev->ctrl->setup_mem == NULL)
return -ENODEV;
if (mi->type > OMAPFB_MEMTYPE_MAX)
if (mi->type != OMAPFB_MEMTYPE_SDRAM)
return -EINVAL;
size = PAGE_ALIGN(mi->size);
@ -1721,16 +1703,9 @@ static int omapfb_do_probe(struct platform_device *pdev,
mutex_init(&fbdev->rqueue_mutex);
#ifdef CONFIG_ARCH_OMAP1
fbdev->int_ctrl = &omap1_int_ctrl;
#ifdef CONFIG_FB_OMAP_LCDC_EXTERNAL
fbdev->ext_if = &omap1_ext_if;
#endif
#else /* OMAP2 */
fbdev->int_ctrl = &omap2_int_ctrl;
#ifdef CONFIG_FB_OMAP_LCDC_EXTERNAL
fbdev->ext_if = &omap2_ext_if;
#endif
#endif
if (omapfb_find_ctrl(fbdev) < 0) {
dev_err(fbdev->dev,
@ -1766,8 +1741,7 @@ static int omapfb_do_probe(struct platform_device *pdev,
#ifdef CONFIG_FB_OMAP_DMA_TUNE
/* Set DMA priority for EMIFF access to highest */
if (cpu_class_is_omap1())
omap_set_dma_priority(0, OMAP_DMA_PORT_EMIFF, 15);
omap_set_dma_priority(0, OMAP_DMA_PORT_EMIFF, 15);
#endif
r = ctrl_change_mode(fbdev->fb_info[0]);

598
drivers/video/omap/rfbi.c
View File

@ -1,598 +0,0 @@
/*
* OMAP2 Remote Frame Buffer Interface support
*
* Copyright (C) 2005 Nokia Corporation
* Author: Juha Yrjölä <juha.yrjola@nokia.com>
* Imre Deak <imre.deak@nokia.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include "omapfb.h"
#include "dispc.h"
/* To work around an RFBI transfer rate limitation */
#define OMAP_RFBI_RATE_LIMIT 1
#define RFBI_BASE 0x48050800
#define RFBI_REVISION 0x0000
#define RFBI_SYSCONFIG 0x0010
#define RFBI_SYSSTATUS 0x0014
#define RFBI_CONTROL 0x0040
#define RFBI_PIXEL_CNT 0x0044
#define RFBI_LINE_NUMBER 0x0048
#define RFBI_CMD 0x004c
#define RFBI_PARAM 0x0050
#define RFBI_DATA 0x0054
#define RFBI_READ 0x0058
#define RFBI_STATUS 0x005c
#define RFBI_CONFIG0 0x0060
#define RFBI_ONOFF_TIME0 0x0064
#define RFBI_CYCLE_TIME0 0x0068
#define RFBI_DATA_CYCLE1_0 0x006c
#define RFBI_DATA_CYCLE2_0 0x0070
#define RFBI_DATA_CYCLE3_0 0x0074
#define RFBI_VSYNC_WIDTH 0x0090
#define RFBI_HSYNC_WIDTH 0x0094
#define DISPC_BASE 0x48050400
#define DISPC_CONTROL 0x0040
#define DISPC_IRQ_FRAMEMASK 0x0001
static struct {
void __iomem *base;
void (*lcdc_callback)(void *data);
void *lcdc_callback_data;
unsigned long l4_khz;
int bits_per_cycle;
struct omapfb_device *fbdev;
struct clk *dss_ick;
struct clk *dss1_fck;
unsigned tearsync_pin_cnt;
unsigned tearsync_mode;
} rfbi;
static inline void rfbi_write_reg(int idx, u32 val)
{
__raw_writel(val, rfbi.base + idx);
}
static inline u32 rfbi_read_reg(int idx)
{
return __raw_readl(rfbi.base + idx);
}
static int rfbi_get_clocks(void)
{
rfbi.dss_ick = clk_get(&rfbi.fbdev->dssdev->dev, "ick");
if (IS_ERR(rfbi.dss_ick)) {
dev_err(rfbi.fbdev->dev, "can't get ick\n");
return PTR_ERR(rfbi.dss_ick);
}
rfbi.dss1_fck = clk_get(&rfbi.fbdev->dssdev->dev, "fck");
if (IS_ERR(rfbi.dss1_fck)) {
dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
clk_put(rfbi.dss_ick);
return PTR_ERR(rfbi.dss1_fck);
}
return 0;
}
static void rfbi_put_clocks(void)
{
clk_put(rfbi.dss1_fck);
clk_put(rfbi.dss_ick);
}
static void rfbi_enable_clocks(int enable)
{
if (enable) {
clk_enable(rfbi.dss_ick);
clk_enable(rfbi.dss1_fck);
} else {
clk_disable(rfbi.dss1_fck);
clk_disable(rfbi.dss_ick);
}
}
#ifdef VERBOSE
static void rfbi_print_timings(void)
{
u32 l;
u32 time;
l = rfbi_read_reg(RFBI_CONFIG0);
time = 1000000000 / rfbi.l4_khz;
if (l & (1 << 4))
time *= 2;
dev_dbg(rfbi.fbdev->dev, "Tick time %u ps\n", time);
l = rfbi_read_reg(RFBI_ONOFF_TIME0);
dev_dbg(rfbi.fbdev->dev,
"CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
"REONTIME %d, REOFFTIME %d\n",
l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
(l >> 20) & 0x0f, (l >> 24) & 0x3f);
l = rfbi_read_reg(RFBI_CYCLE_TIME0);
dev_dbg(rfbi.fbdev->dev,
"WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
"ACCESSTIME %d\n",
(l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
(l >> 22) & 0x3f);
}
#else
static void rfbi_print_timings(void) {}
#endif
static void rfbi_set_timings(const struct extif_timings *t)
{
u32 l;
BUG_ON(!t->converted);
rfbi_enable_clocks(1);
rfbi_write_reg(RFBI_ONOFF_TIME0, t->tim[0]);
rfbi_write_reg(RFBI_CYCLE_TIME0, t->tim[1]);
l = rfbi_read_reg(RFBI_CONFIG0);
l &= ~(1 << 4);
l |= (t->tim[2] ? 1 : 0) << 4;
rfbi_write_reg(RFBI_CONFIG0, l);
rfbi_print_timings();
rfbi_enable_clocks(0);
}
static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
{
*clk_period = 1000000000 / rfbi.l4_khz;
*max_clk_div = 2;
}
static int ps_to_rfbi_ticks(int time, int div)
{
unsigned long tick_ps;
int ret;
/* Calculate in picosecs to yield more exact results */
tick_ps = 1000000000 / (rfbi.l4_khz) * div;
ret = (time + tick_ps - 1) / tick_ps;
return ret;
}
#ifdef OMAP_RFBI_RATE_LIMIT
static unsigned long rfbi_get_max_tx_rate(void)
{
unsigned long l4_rate, dss1_rate;
int min_l4_ticks = 0;
int i;
/* According to TI this can't be calculated so make the
* adjustments for a couple of known frequencies and warn for
* others.
*/
static const struct {
unsigned long l4_clk; /* HZ */
unsigned long dss1_clk; /* HZ */
unsigned long min_l4_ticks;
} ftab[] = {
{ 55, 132, 7, }, /* 7.86 MPix/s */
{ 110, 110, 12, }, /* 9.16 MPix/s */
{ 110, 132, 10, }, /* 11 Mpix/s */
{ 120, 120, 10, }, /* 12 Mpix/s */
{ 133, 133, 10, }, /* 13.3 Mpix/s */
};
l4_rate = rfbi.l4_khz / 1000;
dss1_rate = clk_get_rate(rfbi.dss1_fck) / 1000000;
for (i = 0; i < ARRAY_SIZE(ftab); i++) {
/* Use a window instead of an exact match, to account
* for different DPLL multiplier / divider pairs.
*/
if (abs(ftab[i].l4_clk - l4_rate) < 3 &&
abs(ftab[i].dss1_clk - dss1_rate) < 3) {
min_l4_ticks = ftab[i].min_l4_ticks;
break;
}
}
if (i == ARRAY_SIZE(ftab)) {
/* Can't be sure, return anyway the maximum not
* rate-limited. This might cause a problem only for the
* tearing synchronisation.
*/
dev_err(rfbi.fbdev->dev,
"can't determine maximum RFBI transfer rate\n");
return rfbi.l4_khz * 1000;
}
return rfbi.l4_khz * 1000 / min_l4_ticks;
}
#else
static int rfbi_get_max_tx_rate(void)
{
return rfbi.l4_khz * 1000;
}
#endif
static int rfbi_convert_timings(struct extif_timings *t)
{
u32 l;
int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
int actim, recyc, wecyc;
int div = t->clk_div;
if (div <= 0 || div > 2)
return -1;
/* Make sure that after conversion it still holds that:
* weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
* csoff > cson, csoff >= max(weoff, reoff), actim > reon
*/
weon = ps_to_rfbi_ticks(t->we_on_time, div);
weoff = ps_to_rfbi_ticks(t->we_off_time, div);
if (weoff <= weon)
weoff = weon + 1;
if (weon > 0x0f)
return -1;
if (weoff > 0x3f)
return -1;
reon = ps_to_rfbi_ticks(t->re_on_time, div);
reoff = ps_to_rfbi_ticks(t->re_off_time, div);
if (reoff <= reon)
reoff = reon + 1;
if (reon > 0x0f)
return -1;
if (reoff > 0x3f)
return -1;
cson = ps_to_rfbi_ticks(t->cs_on_time, div);
csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
if (csoff <= cson)
csoff = cson + 1;
if (csoff < max(weoff, reoff))
csoff = max(weoff, reoff);
if (cson > 0x0f)
return -1;
if (csoff > 0x3f)
return -1;
l = cson;
l |= csoff << 4;
l |= weon << 10;
l |= weoff << 14;
l |= reon << 20;
l |= reoff << 24;
t->tim[0] = l;
actim = ps_to_rfbi_ticks(t->access_time, div);
if (actim <= reon)
actim = reon + 1;
if (actim > 0x3f)
return -1;
wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
if (wecyc < weoff)
wecyc = weoff;
if (wecyc > 0x3f)
return -1;
recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
if (recyc < reoff)
recyc = reoff;
if (recyc > 0x3f)
return -1;
cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
if (cs_pulse > 0x3f)
return -1;
l = wecyc;
l |= recyc << 6;
l |= cs_pulse << 12;
l |= actim << 22;
t->tim[1] = l;
t->tim[2] = div - 1;
t->converted = 1;
return 0;
}
static int rfbi_setup_tearsync(unsigned pin_cnt,
unsigned hs_pulse_time, unsigned vs_pulse_time,
int hs_pol_inv, int vs_pol_inv, int extif_div)
{
int hs, vs;
int min;
u32 l;
if (pin_cnt != 1 && pin_cnt != 2)
return -EINVAL;
hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
if (hs < 2)
return -EDOM;
if (pin_cnt == 2)
min = 2;
else
min = 4;
if (vs < min)
return -EDOM;
if (vs == hs)
return -EINVAL;
rfbi.tearsync_pin_cnt = pin_cnt;
dev_dbg(rfbi.fbdev->dev,
"setup_tearsync: pins %d hs %d vs %d hs_inv %d vs_inv %d\n",
pin_cnt, hs, vs, hs_pol_inv, vs_pol_inv);
rfbi_enable_clocks(1);
rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
l = rfbi_read_reg(RFBI_CONFIG0);
if (hs_pol_inv)
l &= ~(1 << 21);
else
l |= 1 << 21;
if (vs_pol_inv)
l &= ~(1 << 20);
else
l |= 1 << 20;
rfbi_enable_clocks(0);
return 0;
}
static int rfbi_enable_tearsync(int enable, unsigned line)
{
u32 l;
dev_dbg(rfbi.fbdev->dev, "tearsync %d line %d mode %d\n",
enable, line, rfbi.tearsync_mode);
if (line > (1 << 11) - 1)
return -EINVAL;
rfbi_enable_clocks(1);
l = rfbi_read_reg(RFBI_CONFIG0);
l &= ~(0x3 << 2);
if (enable) {
rfbi.tearsync_mode = rfbi.tearsync_pin_cnt;
l |= rfbi.tearsync_mode << 2;
} else
rfbi.tearsync_mode = 0;
rfbi_write_reg(RFBI_CONFIG0, l);
rfbi_write_reg(RFBI_LINE_NUMBER, line);
rfbi_enable_clocks(0);
return 0;
}
static void rfbi_write_command(const void *buf, unsigned int len)
{
rfbi_enable_clocks(1);
if (rfbi.bits_per_cycle == 16) {
const u16 *w = buf;
BUG_ON(len & 1);
for (; len; len -= 2)
rfbi_write_reg(RFBI_CMD, *w++);
} else {
const u8 *b = buf;
BUG_ON(rfbi.bits_per_cycle != 8);
for (; len; len--)
rfbi_write_reg(RFBI_CMD, *b++);
}
rfbi_enable_clocks(0);
}
static void rfbi_read_data(void *buf, unsigned int len)
{
rfbi_enable_clocks(1);
if (rfbi.bits_per_cycle == 16) {
u16 *w = buf;
BUG_ON(len & ~1);
for (; len; len -= 2) {
rfbi_write_reg(RFBI_READ, 0);
*w++ = rfbi_read_reg(RFBI_READ);
}
} else {
u8 *b = buf;
BUG_ON(rfbi.bits_per_cycle != 8);
for (; len; len--) {
rfbi_write_reg(RFBI_READ, 0);
*b++ = rfbi_read_reg(RFBI_READ);
}
}
rfbi_enable_clocks(0);
}
static void rfbi_write_data(const void *buf, unsigned int len)
{
rfbi_enable_clocks(1);
if (rfbi.bits_per_cycle == 16) {
const u16 *w = buf;
BUG_ON(len & 1);
for (; len; len -= 2)
rfbi_write_reg(RFBI_PARAM, *w++);
} else {
const u8 *b = buf;
BUG_ON(rfbi.bits_per_cycle != 8);
for (; len; len--)
rfbi_write_reg(RFBI_PARAM, *b++);
}
rfbi_enable_clocks(0);
}
static void rfbi_transfer_area(int width, int height,
void (callback)(void * data), void *data)
{
u32 w;
BUG_ON(callback == NULL);
rfbi_enable_clocks(1);
omap_dispc_set_lcd_size(width, height);
rfbi.lcdc_callback = callback;
rfbi.lcdc_callback_data = data;
rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
w = rfbi_read_reg(RFBI_CONTROL);
w |= 1; /* enable */
if (!rfbi.tearsync_mode)
w |= 1 << 4; /* internal trigger, reset by HW */
rfbi_write_reg(RFBI_CONTROL, w);
omap_dispc_enable_lcd_out(1);
}
static inline void _stop_transfer(void)
{
u32 w;
w = rfbi_read_reg(RFBI_CONTROL);
rfbi_write_reg(RFBI_CONTROL, w & ~(1 << 0));
rfbi_enable_clocks(0);
}
static void rfbi_dma_callback(void *data)
{
_stop_transfer();
rfbi.lcdc_callback(rfbi.lcdc_callback_data);
}
static void rfbi_set_bits_per_cycle(int bpc)
{
u32 l;
rfbi_enable_clocks(1);
l = rfbi_read_reg(RFBI_CONFIG0);
l &= ~(0x03 << 0);
switch (bpc) {
case 8:
break;
case 16:
l |= 3;
break;
default:
BUG();
}
rfbi_write_reg(RFBI_CONFIG0, l);
rfbi.bits_per_cycle = bpc;
rfbi_enable_clocks(0);
}
static int rfbi_init(struct omapfb_device *fbdev)
{
u32 l;
int r;
rfbi.fbdev = fbdev;
rfbi.base = ioremap(RFBI_BASE, SZ_1K);
if (!rfbi.base) {
dev_err(fbdev->dev, "can't ioremap RFBI\n");
return -ENOMEM;
}
if ((r = rfbi_get_clocks()) < 0)
return r;
rfbi_enable_clocks(1);
rfbi.l4_khz = clk_get_rate(rfbi.dss_ick) / 1000;
/* Reset */
rfbi_write_reg(RFBI_SYSCONFIG, 1 << 1);
while (!(rfbi_read_reg(RFBI_SYSSTATUS) & (1 << 0)));
l = rfbi_read_reg(RFBI_SYSCONFIG);
/* Enable autoidle and smart-idle */
l |= (1 << 0) | (2 << 3);
rfbi_write_reg(RFBI_SYSCONFIG, l);
/* 16-bit interface, ITE trigger mode, 16-bit data */
l = (0x03 << 0) | (0x00 << 2) | (0x01 << 5) | (0x02 << 7);
l |= (0 << 9) | (1 << 20) | (1 << 21);
rfbi_write_reg(RFBI_CONFIG0, l);
rfbi_write_reg(RFBI_DATA_CYCLE1_0, 0x00000010);
l = rfbi_read_reg(RFBI_CONTROL);
/* Select CS0, clear bypass mode */
l = (0x01 << 2);
rfbi_write_reg(RFBI_CONTROL, l);
r = omap_dispc_request_irq(DISPC_IRQ_FRAMEMASK, rfbi_dma_callback,
NULL);
if (r < 0) {
dev_err(fbdev->dev, "can't get DISPC irq\n");
rfbi_enable_clocks(0);
return r;
}
l = rfbi_read_reg(RFBI_REVISION);
pr_info("omapfb: RFBI version %d.%d initialized\n",
(l >> 4) & 0x0f, l & 0x0f);
rfbi_enable_clocks(0);
return 0;
}
static void rfbi_cleanup(void)
{
omap_dispc_free_irq(DISPC_IRQ_FRAMEMASK, rfbi_dma_callback, NULL);
rfbi_put_clocks();
iounmap(rfbi.base);
}
const struct lcd_ctrl_extif omap2_ext_if = {
.init = rfbi_init,
.cleanup = rfbi_cleanup,
.get_clk_info = rfbi_get_clk_info,
.get_max_tx_rate = rfbi_get_max_tx_rate,
.set_bits_per_cycle = rfbi_set_bits_per_cycle,
.convert_timings = rfbi_convert_timings,
.set_timings = rfbi_set_timings,
.write_command = rfbi_write_command,
.read_data = rfbi_read_data,
.write_data = rfbi_write_data,
.transfer_area = rfbi_transfer_area,
.setup_tearsync = rfbi_setup_tearsync,
.enable_tearsync = rfbi_enable_tearsync,
.max_transmit_size = (u32) ~0,
};

1
drivers/video/omap2/dss/dispc.c
View File

@ -37,7 +37,6 @@
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <plat/sram.h>
#include <plat/clock.h>
#include <video/omapdss.h>

2
drivers/video/omap2/omapfb/omapfb-ioctl.c
View File

@ -215,7 +215,7 @@ static int omapfb_setup_mem(struct fb_info *fbi, struct omapfb_mem_info *mi)
int r = 0, i;
size_t size;
if (mi->type > OMAPFB_MEMTYPE_MAX)
if (mi->type != OMAPFB_MEMTYPE_SDRAM)
return -EINVAL;
size = PAGE_ALIGN(mi->size);

101
drivers/video/omap2/omapfb/omapfb-main.c
View File

@ -1399,7 +1399,7 @@ static int omapfb_alloc_fbmem(struct fb_info *fbi, unsigned long size,
if (!paddr) {
DBG("allocating %lu bytes for fb %d\n", size, ofbi->id);
r = omap_vram_alloc(OMAP_VRAM_MEMTYPE_SDRAM, size, &paddr);
r = omap_vram_alloc(size, &paddr);
} else {
DBG("reserving %lu bytes at %lx for fb %d\n", size, paddr,
ofbi->id);
@ -1487,60 +1487,6 @@ static int omapfb_alloc_fbmem_display(struct fb_info *fbi, unsigned long size,
return omapfb_alloc_fbmem(fbi, size, paddr);
}
static enum omap_color_mode fb_format_to_dss_mode(enum omapfb_color_format fmt)
{
enum omap_color_mode mode;
switch (fmt) {
case OMAPFB_COLOR_RGB565:
mode = OMAP_DSS_COLOR_RGB16;
break;
case OMAPFB_COLOR_YUV422:
mode = OMAP_DSS_COLOR_YUV2;
break;
case OMAPFB_COLOR_CLUT_8BPP:
mode = OMAP_DSS_COLOR_CLUT8;
break;
case OMAPFB_COLOR_CLUT_4BPP:
mode = OMAP_DSS_COLOR_CLUT4;
break;
case OMAPFB_COLOR_CLUT_2BPP:
mode = OMAP_DSS_COLOR_CLUT2;
break;
case OMAPFB_COLOR_CLUT_1BPP:
mode = OMAP_DSS_COLOR_CLUT1;
break;
case OMAPFB_COLOR_RGB444:
mode = OMAP_DSS_COLOR_RGB12U;
break;
case OMAPFB_COLOR_YUY422:
mode = OMAP_DSS_COLOR_UYVY;
break;
case OMAPFB_COLOR_ARGB16:
mode = OMAP_DSS_COLOR_ARGB16;
break;
case OMAPFB_COLOR_RGB24U:
mode = OMAP_DSS_COLOR_RGB24U;
break;
case OMAPFB_COLOR_RGB24P:
mode = OMAP_DSS_COLOR_RGB24P;
break;
case OMAPFB_COLOR_ARGB32:
mode = OMAP_DSS_COLOR_ARGB32;
break;
case OMAPFB_COLOR_RGBA32:
mode = OMAP_DSS_COLOR_RGBA32;
break;
case OMAPFB_COLOR_RGBX32:
mode = OMAP_DSS_COLOR_RGBX32;
break;
default:
mode = -EINVAL;
}
return mode;
}
static int omapfb_parse_vram_param(const char *param, int max_entries,
unsigned long *sizes, unsigned long *paddrs)
{
@ -1614,23 +1560,6 @@ static int omapfb_allocate_all_fbs(struct omapfb2_device *fbdev)
memset(&vram_paddrs, 0, sizeof(vram_paddrs));
}
if (fbdev->dev->platform_data) {
struct omapfb_platform_data *opd;
opd = fbdev->dev->platform_data;
for (i = 0; i < opd->mem_desc.region_cnt; ++i) {
if (!vram_sizes[i]) {
unsigned long size;
unsigned long paddr;
size = opd->mem_desc.region[i].size;
paddr = opd->mem_desc.region[i].paddr;
vram_sizes[i] = size;
vram_paddrs[i] = paddr;
}
}
}
for (i = 0; i < fbdev->num_fbs; i++) {
/* allocate memory automatically only for fb0, or if
* excplicitly defined with vram or plat data option */
@ -1669,7 +1598,7 @@ int omapfb_realloc_fbmem(struct fb_info *fbi, unsigned long size, int type)
int old_type = rg->type;
int r;
if (type > OMAPFB_MEMTYPE_MAX)
if (type != OMAPFB_MEMTYPE_SDRAM)
return -EINVAL;
size = PAGE_ALIGN(size);
@ -1828,32 +1757,6 @@ static int omapfb_fb_init(struct omapfb2_device *fbdev, struct fb_info *fbi)
var->rotate = def_rotate;
/*
* Check if there is a default color format set in the board file,
* and use this format instead the default deducted from the
* display bpp.
*/
if (fbdev->dev->platform_data) {
struct omapfb_platform_data *opd;
int id = ofbi->id;
opd = fbdev->dev->platform_data;
if (opd->mem_desc.region[id].format_used) {
enum omap_color_mode mode;
enum omapfb_color_format format;
format = opd->mem_desc.region[id].format;
mode = fb_format_to_dss_mode(format);
if (mode < 0) {
r = mode;
goto err;
}
r = dss_mode_to_fb_mode(mode, var);
if (r < 0)
goto err;
}
}
if (display) {
u16 w, h;
int rotation = (var->rotate + ofbi->rotation[0]) % 4;

99
drivers/video/omap2/vram.c
View File

@ -33,7 +33,6 @@
#include <asm/setup.h>
#include <plat/sram.h>
#include <plat/vram.h>
#include <plat/dma.h>
@ -43,10 +42,6 @@
#define DBG(format, ...)
#endif
#define OMAP2_SRAM_START 0x40200000
/* Maximum size, in reality this is smaller if SRAM is partially locked. */
#define OMAP2_SRAM_SIZE 0xa0000 /* 640k */
/* postponed regions are used to temporarily store region information at boot
* time when we cannot yet allocate the region list */
#define MAX_POSTPONED_REGIONS 10
@ -74,15 +69,6 @@ struct vram_region {
static DEFINE_MUTEX(region_mutex);
static LIST_HEAD(region_list);
static inline int region_mem_type(unsigned long paddr)
{
if (paddr >= OMAP2_SRAM_START &&
paddr < OMAP2_SRAM_START + OMAP2_SRAM_SIZE)
return OMAP_VRAM_MEMTYPE_SRAM;
else
return OMAP_VRAM_MEMTYPE_SDRAM;
}
static struct vram_region *omap_vram_create_region(unsigned long paddr,
unsigned pages)
{
@ -212,9 +198,6 @@ static int _omap_vram_reserve(unsigned long paddr, unsigned pages)
DBG("checking region %lx %d\n", rm->paddr, rm->pages);
if (region_mem_type(rm->paddr) != region_mem_type(paddr))
continue;
start = rm->paddr;
end = start + (rm->pages << PAGE_SHIFT) - 1;
if (start > paddr || end < paddr + size - 1)
@ -320,7 +303,7 @@ err:
return r;
}
static int _omap_vram_alloc(int mtype, unsigned pages, unsigned long *paddr)
static int _omap_vram_alloc(unsigned pages, unsigned long *paddr)
{
struct vram_region *rm;
struct vram_alloc *alloc;
@ -330,9 +313,6 @@ static int _omap_vram_alloc(int mtype, unsigned pages, unsigned long *paddr)
DBG("checking region %lx %d\n", rm->paddr, rm->pages);
if (region_mem_type(rm->paddr) != mtype)
continue;
start = rm->paddr;
list_for_each_entry(alloc, &rm->alloc_list, list) {
@ -365,21 +345,21 @@ found:
return -ENOMEM;
}
int omap_vram_alloc(int mtype, size_t size, unsigned long *paddr)
int omap_vram_alloc(size_t size, unsigned long *paddr)
{
unsigned pages;
int r;
BUG_ON(mtype > OMAP_VRAM_MEMTYPE_MAX || !size);
BUG_ON(!size);
DBG("alloc mem type %d size %d\n", mtype, size);
DBG("alloc mem size %d\n", size);
size = PAGE_ALIGN(size);
pages = size >> PAGE_SHIFT;
mutex_lock(&region_mutex);
r = _omap_vram_alloc(mtype, pages, paddr);
r = _omap_vram_alloc(pages, paddr);
mutex_unlock(&region_mutex);
@ -500,10 +480,6 @@ arch_initcall(omap_vram_init);
/* boottime vram alloc stuff */
/* set from board file */
static u32 omap_vram_sram_start __initdata;
static u32 omap_vram_sram_size __initdata;
/* set from board file */
static u32 omap_vram_sdram_start __initdata;
static u32 omap_vram_sdram_size __initdata;
@ -587,73 +563,8 @@ void __init omap_vram_reserve_sdram_memblock(void)
pr_info("Reserving %u bytes SDRAM for VRAM\n", size);
}
/*
* Called at sram init time, before anything is pushed to the SRAM stack.
* Because of the stack scheme, we will allocate everything from the
* start of the lowest address region to the end of SRAM. This will also
* include padding for page alignment and possible holes between regions.
*
* As opposed to the SDRAM case, we'll also do any dynamic allocations at
* this point, since the driver built as a module would have problem with
* freeing / reallocating the regions.
*/
unsigned long __init omap_vram_reserve_sram(unsigned long sram_pstart,
unsigned long sram_vstart,
unsigned long sram_size,
unsigned long pstart_avail,
unsigned long size_avail)
{
unsigned long pend_avail;
unsigned long reserved;
u32 paddr;
u32 size;
paddr = omap_vram_sram_start;
size = omap_vram_sram_size;
if (!size)
return 0;
reserved = 0;
pend_avail = pstart_avail + size_avail;
if (!paddr) {
/* Dynamic allocation */
if ((size_avail & PAGE_MASK) < size) {
pr_err("Not enough SRAM for VRAM\n");
return 0;
}
size_avail = (size_avail - size) & PAGE_MASK;
paddr = pstart_avail + size_avail;
}
if (paddr < sram_pstart ||
paddr + size > sram_pstart + sram_size) {
pr_err("Illegal SRAM region for VRAM\n");
return 0;
}
/* Reserve everything above the start of the region. */
if (pend_avail - paddr > reserved)
reserved = pend_avail - paddr;
size_avail = pend_avail - reserved - pstart_avail;
omap_vram_add_region(paddr, size);
if (reserved)
pr_info("Reserving %lu bytes SRAM for VRAM\n", reserved);
return reserved;
}
void __init omap_vram_set_sdram_vram(u32 size, u32 start)
{
omap_vram_sdram_start = start;
omap_vram_sdram_size = size;
}
void __init omap_vram_set_sram_vram(u32 size, u32 start)
{
omap_vram_sram_start = start;
omap_vram_sram_size = size;
}

32
include/linux/omapfb.h
View File

@ -222,41 +222,11 @@ struct omapfb_display_info {
#include <plat/board.h>
#ifdef CONFIG_ARCH_OMAP1
#define OMAPFB_PLANE_NUM 1
#else
#define OMAPFB_PLANE_NUM 3
#endif
struct omapfb_mem_region {
u32 paddr;
void __iomem *vaddr;
unsigned long size;
u8 type; /* OMAPFB_PLANE_MEM_* */
enum omapfb_color_format format;/* OMAPFB_COLOR_* */
unsigned format_used:1; /* Must be set when format is set.
* Needed b/c of the badly chosen 0
* base for OMAPFB_COLOR_* values
*/
unsigned alloc:1; /* allocated by the driver */
unsigned map:1; /* kernel mapped by the driver */
};
struct omapfb_mem_desc {
int region_cnt;
struct omapfb_mem_region region[OMAPFB_PLANE_NUM];
};
struct omapfb_platform_data {
struct omap_lcd_config lcd;
struct omapfb_mem_desc mem_desc;
void *ctrl_platform_data;
};
/* in arch/arm/plat-omap/fb.c */
extern void omapfb_set_platform_data(struct omapfb_platform_data *data);
extern void omapfb_set_ctrl_platform_data(void *pdata);
extern void omapfb_reserve_sdram_memblock(void);
void __init omapfb_set_lcd_config(const struct omap_lcd_config *config);
#endif