drm/amd/display: USB-C / thunderbolt dock specific workaround
reading dpcd 0x600 cause link loss for a particular USB-C dock with thurderbolt. workaround by avoiding dcpd 0x600 read unless it's necessary. Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1512,7 +1512,7 @@ static bool hpd_rx_irq_check_link_loss_status(
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struct dc_link *link,
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union hpd_irq_data *hpd_irq_dpcd_data)
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{
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uint8_t irq_reg_rx_power_state;
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uint8_t irq_reg_rx_power_state = 0;
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enum dc_status dpcd_result = DC_ERROR_UNEXPECTED;
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union lane_status lane_status;
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uint32_t lane;
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@ -1524,60 +1524,55 @@ static bool hpd_rx_irq_check_link_loss_status(
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if (link->cur_link_settings.lane_count == 0)
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return return_code;
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/*1. Check that we can handle interrupt: Not in FS DOS,
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* Not in "Display Timeout" state, Link is trained.
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*/
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dpcd_result = core_link_read_dpcd(link,
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DP_SET_POWER,
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&irq_reg_rx_power_state,
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sizeof(irq_reg_rx_power_state));
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/*1. Check that Link Status changed, before re-training.*/
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if (dpcd_result != DC_OK) {
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irq_reg_rx_power_state = DP_SET_POWER_D0;
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dm_logger_write(link->ctx->logger, LOG_HW_HPD_IRQ,
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"%s: DPCD read failed to obtain power state.\n",
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__func__);
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/*parse lane status*/
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for (lane = 0; lane < link->cur_link_settings.lane_count; lane++) {
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/* check status of lanes 0,1
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* changed DpcdAddress_Lane01Status (0x202)
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*/
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lane_status.raw = get_nibble_at_index(
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&hpd_irq_dpcd_data->bytes.lane01_status.raw,
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lane);
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if (!lane_status.bits.CHANNEL_EQ_DONE_0 ||
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!lane_status.bits.CR_DONE_0 ||
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!lane_status.bits.SYMBOL_LOCKED_0) {
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/* if one of the channel equalization, clock
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* recovery or symbol lock is dropped
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* consider it as (link has been
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* dropped) dp sink status has changed
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*/
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sink_status_changed = true;
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break;
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}
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}
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if (irq_reg_rx_power_state == DP_SET_POWER_D0) {
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/* Check interlane align.*/
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if (sink_status_changed ||
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!hpd_irq_dpcd_data->bytes.lane_status_updated.bits.INTERLANE_ALIGN_DONE) {
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/*2. Check that Link Status changed, before re-training.*/
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dm_logger_write(link->ctx->logger, LOG_HW_HPD_IRQ,
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"%s: Link Status changed.\n", __func__);
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/*parse lane status*/
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for (lane = 0;
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lane < link->cur_link_settings.lane_count;
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lane++) {
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return_code = true;
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/* check status of lanes 0,1
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* changed DpcdAddress_Lane01Status (0x202)*/
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lane_status.raw = get_nibble_at_index(
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&hpd_irq_dpcd_data->bytes.lane01_status.raw,
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lane);
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if (!lane_status.bits.CHANNEL_EQ_DONE_0 ||
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!lane_status.bits.CR_DONE_0 ||
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!lane_status.bits.SYMBOL_LOCKED_0) {
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/* if one of the channel equalization, clock
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* recovery or symbol lock is dropped
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* consider it as (link has been
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* dropped) dp sink status has changed*/
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sink_status_changed = true;
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break;
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}
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}
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/* Check interlane align.*/
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if (sink_status_changed ||
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!hpd_irq_dpcd_data->bytes.lane_status_updated.bits.
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INTERLANE_ALIGN_DONE) {
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/*2. Check that we can handle interrupt: Not in FS DOS,
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* Not in "Display Timeout" state, Link is trained.
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*/
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dpcd_result = core_link_read_dpcd(link,
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DP_SET_POWER,
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&irq_reg_rx_power_state,
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sizeof(irq_reg_rx_power_state));
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if (dpcd_result != DC_OK) {
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dm_logger_write(link->ctx->logger, LOG_HW_HPD_IRQ,
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"%s: Link Status changed.\n",
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"%s: DPCD read failed to obtain power state.\n",
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__func__);
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return_code = true;
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} else {
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if (irq_reg_rx_power_state != DP_SET_POWER_D0)
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return_code = false;
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}
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}
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