- Fix kernel build with the integrated LLVM assembler which doesn't
see the -Wa,-march option. - Fix "make vdso_install" when COMPAT_VDSO is disabled. - Make KVM more robust if the AT S1E1R instruction triggers an exception (architecture corner cases). -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl9JPWEACgkQa9axLQDI XvFLuBAAjTz6SgaLVk5vtoNlNXR+zx/AcwG1hFthWaPqwRLjEVogwZ76Hx7qOStb M2+rEsr7q8BKAsI7nU1OJGfDMbyozqDxCIq89NmOgCm3TTze/BiZx7KIL+l5aQea 5qiPIt3pwhPaFGAnQLDbdBJ7Iz34VbB8bqxLi9tz5RkbfFFEIkNgobrljVj71ZLp 7xDn8+w54iVqnMrhSTQtPtbdIpgpBO0HL6PuX6jBY+sGfkwpaZCKMdgU4HVkhW8t kgmj3S/orMtPvZvQXDZflFdDn+dS0c0dyJlzTu7qyJjL/zgma5RYwLSaWSH2kcib lsna1Xoge1Iqzj7QKT8uzsfCHkZ+ANr17oB8YakQtu1HmVDgvOiDX5v44+aLKdJd mRwa+UtJT7cVl7I/3r7rOZyb+ApcmjD5Wft7Hi6lOQSfNp+kBRcBCaOcKdh0Gk4A KFlZYBnXywo1Xy06HkUSIL3k+qvrHMHC5g6S2XmIL6BYvj08poq6BUTlqSAIuzp4 GzIzEusqPX80V8MQeRvJ8XmIPtzqgiA4AVCshAwrSiUcEgYWpsWb+yPTpKpnygpd UyuuUmfxR7I9ctNw25C4jebdi+gLQoCwCQqRqHR/0Fj4KvkQnAKIWDa52Dcl85Qp nedLKsEDc+Tb7ePfp9VzgJ3OmVQUL4hiYDIR3YSVeQrG3R9O72A= =wzsB -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - Fix kernel build with the integrated LLVM assembler which doesn't see the -Wa,-march option. - Fix "make vdso_install" when COMPAT_VDSO is disabled. - Make KVM more robust if the AT S1E1R instruction triggers an exception (architecture corner cases). * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: KVM: arm64: Set HCR_EL2.PTW to prevent AT taking synchronous exception KVM: arm64: Survive synchronous exceptions caused by AT instructions KVM: arm64: Add kvm_extable for vaxorcism code arm64: vdso32: make vdso32 install conditional arm64: use a common .arch preamble for inline assembly
This commit is contained in:
commit
96d454cd2c
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@ -82,8 +82,8 @@ endif
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# compiler to generate them and consequently to break the single image contract
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# we pass it only to the assembler. This option is utilized only in case of non
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# integrated assemblers.
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ifneq ($(CONFIG_AS_HAS_ARMV8_4), y)
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branch-prot-flags-$(CONFIG_AS_HAS_PAC) += -Wa,-march=armv8.3-a
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ifeq ($(CONFIG_AS_HAS_PAC), y)
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asm-arch := armv8.3-a
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endif
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endif
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@ -91,7 +91,12 @@ KBUILD_CFLAGS += $(branch-prot-flags-y)
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ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)
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# make sure to pass the newest target architecture to -march.
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KBUILD_CFLAGS += -Wa,-march=armv8.4-a
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asm-arch := armv8.4-a
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endif
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ifdef asm-arch
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KBUILD_CFLAGS += -Wa,-march=$(asm-arch) \
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-DARM64_ASM_ARCH='"$(asm-arch)"'
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endif
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ifeq ($(CONFIG_SHADOW_CALL_STACK), y)
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@ -165,7 +170,8 @@ zinstall install:
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PHONY += vdso_install
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vdso_install:
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$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
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$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@
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$(if $(CONFIG_COMPAT_VDSO), \
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$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@)
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# We use MRPROPER_FILES and CLEAN_FILES now
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archclean:
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@ -2,6 +2,12 @@
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#ifndef __ASM_COMPILER_H
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#define __ASM_COMPILER_H
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#ifdef ARM64_ASM_ARCH
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#define ARM64_ASM_PREAMBLE ".arch " ARM64_ASM_ARCH "\n"
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#else
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#define ARM64_ASM_PREAMBLE
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#endif
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/*
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* The EL0/EL1 pointer bits used by a pointer authentication code.
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* This is dependent on TBI0/TBI1 being enabled, or bits 63:56 would also apply.
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@ -71,11 +71,12 @@
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* IMO: Override CPSR.I and enable signaling with VI
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* FMO: Override CPSR.F and enable signaling with VF
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* SWIO: Turn set/way invalidates into set/way clean+invalidate
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* PTW: Take a stage2 fault if a stage1 walk steps in device memory
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*/
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#define HCR_GUEST_FLAGS (HCR_TSC | HCR_TSW | HCR_TWE | HCR_TWI | HCR_VM | \
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HCR_BSU_IS | HCR_FB | HCR_TAC | \
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HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_TLOR | \
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HCR_FMO | HCR_IMO)
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HCR_FMO | HCR_IMO | HCR_PTW )
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#define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
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#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK)
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#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
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@ -169,6 +169,34 @@ extern char __smccc_workaround_1_smc[__SMCCC_WORKAROUND_1_SMC_SZ];
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*__hyp_this_cpu_ptr(sym); \
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})
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#define __KVM_EXTABLE(from, to) \
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" .pushsection __kvm_ex_table, \"a\"\n" \
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" .align 3\n" \
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" .long (" #from " - .), (" #to " - .)\n" \
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" .popsection\n"
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#define __kvm_at(at_op, addr) \
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( { \
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int __kvm_at_err = 0; \
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u64 spsr, elr; \
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asm volatile( \
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" mrs %1, spsr_el2\n" \
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" mrs %2, elr_el2\n" \
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"1: at "at_op", %3\n" \
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" isb\n" \
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" b 9f\n" \
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"2: msr spsr_el2, %1\n" \
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" msr elr_el2, %2\n" \
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" mov %w0, %4\n" \
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"9:\n" \
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__KVM_EXTABLE(1b, 2b) \
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: "+r" (__kvm_at_err), "=&r" (spsr), "=&r" (elr) \
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: "r" (addr), "i" (-EFAULT)); \
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__kvm_at_err; \
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} )
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#else /* __ASSEMBLY__ */
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.macro hyp_adr_this_cpu reg, sym, tmp
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ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
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.endm
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/*
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* KVM extable for unexpected exceptions.
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* In the same format _asm_extable, but output to a different section so that
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* it can be mapped to EL2. The KVM version is not sorted. The caller must
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* ensure:
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* x18 has the hypervisor value to allow any Shadow-Call-Stack instrumented
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* code to write to it, and that SPSR_EL2 and ELR_EL2 are restored by the fixup.
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*/
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.macro _kvm_extable, from, to
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.pushsection __kvm_ex_table, "a"
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.align 3
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.long (\from - .), (\to - .)
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.popsection
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.endm
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#endif
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#endif /* __ARM_KVM_ASM_H__ */
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@ -28,14 +28,16 @@
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* not. The macros handles invoking the asm with or without the
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* register argument as appropriate.
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*/
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#define __TLBI_0(op, arg) asm ("tlbi " #op "\n" \
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#define __TLBI_0(op, arg) asm (ARM64_ASM_PREAMBLE \
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"tlbi " #op "\n" \
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ALTERNATIVE("nop\n nop", \
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"dsb ish\n tlbi " #op, \
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ARM64_WORKAROUND_REPEAT_TLBI, \
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CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
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: : )
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#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n" \
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#define __TLBI_1(op, arg) asm (ARM64_ASM_PREAMBLE \
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"tlbi " #op ", %0\n" \
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ALTERNATIVE("nop\n nop", \
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"dsb ish\n tlbi " #op ", %0", \
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ARM64_WORKAROUND_REPEAT_TLBI, \
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@ -103,6 +103,10 @@ KVM_NVHE_ALIAS(vgic_v3_cpuif_trap);
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KVM_NVHE_ALIAS(gic_pmr_sync);
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#endif
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/* EL2 exception handling */
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KVM_NVHE_ALIAS(__start___kvm_ex_table);
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KVM_NVHE_ALIAS(__stop___kvm_ex_table);
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#endif /* CONFIG_KVM */
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#endif /* __ARM64_KERNEL_IMAGE_VARS_H */
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@ -20,6 +20,13 @@ ENTRY(_text)
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jiffies = jiffies_64;
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#define HYPERVISOR_EXTABLE \
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. = ALIGN(SZ_8); \
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__start___kvm_ex_table = .; \
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*(__kvm_ex_table) \
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__stop___kvm_ex_table = .;
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#define HYPERVISOR_TEXT \
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/* \
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* Align to 4 KB so that \
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__hyp_idmap_text_end = .; \
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__hyp_text_start = .; \
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*(.hyp.text) \
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HYPERVISOR_EXTABLE \
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__hyp_text_end = .;
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#define IDMAP_TEXT \
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@ -196,20 +196,23 @@ alternative_endif
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// This is our single instruction exception window. A pending
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// SError is guaranteed to occur at the earliest when we unmask
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// it, and at the latest just after the ISB.
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.global abort_guest_exit_start
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abort_guest_exit_start:
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isb
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.global abort_guest_exit_end
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abort_guest_exit_end:
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msr daifset, #4 // Mask aborts
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ret
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// If the exception took place, restore the EL1 exception
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// context so that we can report some information.
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// Merge the exception code with the SError pending bit.
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tbz x0, #ARM_EXIT_WITH_SERROR_BIT, 1f
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_kvm_extable abort_guest_exit_start, 9997f
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_kvm_extable abort_guest_exit_end, 9997f
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9997:
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msr daifset, #4 // Mask aborts
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mov x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
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// restore the EL1 exception context so that we can report some
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// information. Merge the exception code with the SError pending bit.
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msr elr_el2, x2
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msr esr_el2, x3
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msr spsr_el2, x4
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@ -15,6 +15,30 @@
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#include <asm/kvm_mmu.h>
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#include <asm/mmu.h>
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.macro save_caller_saved_regs_vect
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/* x0 and x1 were saved in the vector entry */
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stp x2, x3, [sp, #-16]!
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stp x4, x5, [sp, #-16]!
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stp x6, x7, [sp, #-16]!
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stp x8, x9, [sp, #-16]!
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stp x10, x11, [sp, #-16]!
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stp x12, x13, [sp, #-16]!
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stp x14, x15, [sp, #-16]!
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stp x16, x17, [sp, #-16]!
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.endm
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.macro restore_caller_saved_regs_vect
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ldp x16, x17, [sp], #16
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ldp x14, x15, [sp], #16
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ldp x12, x13, [sp], #16
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ldp x10, x11, [sp], #16
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ldp x8, x9, [sp], #16
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ldp x6, x7, [sp], #16
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ldp x4, x5, [sp], #16
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ldp x2, x3, [sp], #16
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ldp x0, x1, [sp], #16
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.endm
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.text
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.macro do_el2_call
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@ -143,13 +167,19 @@ el1_error:
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b __guest_exit
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el2_sync:
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/* Check for illegal exception return, otherwise panic */
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/* Check for illegal exception return */
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mrs x0, spsr_el2
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tbnz x0, #20, 1f
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/* if this was something else, then panic! */
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tst x0, #PSR_IL_BIT
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b.eq __hyp_panic
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save_caller_saved_regs_vect
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stp x29, x30, [sp, #-16]!
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bl kvm_unexpected_el2_exception
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ldp x29, x30, [sp], #16
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restore_caller_saved_regs_vect
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eret
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1:
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/* Let's attempt a recovery from the illegal exception return */
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get_vcpu_ptr x1, x0
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mov x0, #ARM_EXCEPTION_IL
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@ -157,27 +187,14 @@ el2_sync:
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el2_error:
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ldp x0, x1, [sp], #16
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save_caller_saved_regs_vect
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stp x29, x30, [sp, #-16]!
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bl kvm_unexpected_el2_exception
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ldp x29, x30, [sp], #16
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restore_caller_saved_regs_vect
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/*
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* Only two possibilities:
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* 1) Either we come from the exit path, having just unmasked
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* PSTATE.A: change the return code to an EL2 fault, and
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* carry on, as we're already in a sane state to handle it.
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* 2) Or we come from anywhere else, and that's a bug: we panic.
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*
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* For (1), x0 contains the original return code and x1 doesn't
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* contain anything meaningful at that stage. We can reuse them
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* as temp registers.
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* For (2), who cares?
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*/
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mrs x0, elr_el2
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adr x1, abort_guest_exit_start
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cmp x0, x1
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adr x1, abort_guest_exit_end
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ccmp x0, x1, #4, ne
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b.ne __hyp_panic
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mov x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
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eret
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sb
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@ -17,6 +17,7 @@
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#include <asm/barrier.h>
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#include <asm/cpufeature.h>
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#include <asm/extable.h>
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#include <asm/kprobes.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_emulate.h>
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|
@ -29,6 +30,9 @@
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extern const char __hyp_panic_string[];
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extern struct exception_table_entry __start___kvm_ex_table;
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extern struct exception_table_entry __stop___kvm_ex_table;
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/* Check whether the FP regs were dirtied while in the host-side run loop: */
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static inline bool update_fp_enabled(struct kvm_vcpu *vcpu)
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{
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|
@ -142,10 +146,10 @@ static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar)
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* saved the guest context yet, and we may return early...
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*/
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par = read_sysreg(par_el1);
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asm volatile("at s1e1r, %0" : : "r" (far));
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isb();
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tmp = read_sysreg(par_el1);
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if (!__kvm_at("s1e1r", far))
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tmp = read_sysreg(par_el1);
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else
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tmp = SYS_PAR_EL1_F; /* back to the guest */
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write_sysreg(par, par_el1);
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if (unlikely(tmp & SYS_PAR_EL1_F))
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|
@ -508,4 +512,31 @@ static inline void __set_host_arch_workaround_state(struct kvm_vcpu *vcpu)
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#endif
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}
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static inline void __kvm_unexpected_el2_exception(void)
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||||
{
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||||
unsigned long addr, fixup;
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struct kvm_cpu_context *host_ctxt;
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||||
struct exception_table_entry *entry, *end;
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||||
unsigned long elr_el2 = read_sysreg(elr_el2);
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||||
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entry = hyp_symbol_addr(__start___kvm_ex_table);
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end = hyp_symbol_addr(__stop___kvm_ex_table);
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host_ctxt = &__hyp_this_cpu_ptr(kvm_host_data)->host_ctxt;
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||||
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||||
while (entry < end) {
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||||
addr = (unsigned long)&entry->insn + entry->insn;
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||||
fixup = (unsigned long)&entry->fixup + entry->fixup;
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||||
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||||
if (addr != elr_el2) {
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||||
entry++;
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||||
continue;
|
||||
}
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||||
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||||
write_sysreg(fixup, elr_el2);
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||||
return;
|
||||
}
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||||
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||||
hyp_panic(host_ctxt);
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||||
}
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||||
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||||
#endif /* __ARM64_KVM_HYP_SWITCH_H__ */
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||||
|
|
|
@ -270,3 +270,8 @@ void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt)
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|||
read_sysreg(hpfar_el2), par, vcpu);
|
||||
unreachable();
|
||||
}
|
||||
|
||||
asmlinkage void kvm_unexpected_el2_exception(void)
|
||||
{
|
||||
return __kvm_unexpected_el2_exception();
|
||||
}
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||||
|
|
|
@ -217,3 +217,8 @@ void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt)
|
|||
__hyp_call_panic(spsr, elr, par, host_ctxt);
|
||||
unreachable();
|
||||
}
|
||||
|
||||
asmlinkage void kvm_unexpected_el2_exception(void)
|
||||
{
|
||||
return __kvm_unexpected_el2_exception();
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue