x86 gart: rename CONFIG_IOMMU to CONFIG_GART_IOMMU

This patch renames the IOMMU config option to GART_IOMMU because in fact it
means the GART and not general support for an IOMMU on x86.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Acked-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Joerg Roedel 2007-10-24 12:49:48 +02:00 committed by Thomas Gleixner
parent 395624fcdd
commit 966396d3a0
11 changed files with 16 additions and 16 deletions

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@ -91,7 +91,7 @@ config DOUBLEFAULT
config IOMMU_DEBUG
bool "Enable IOMMU debugging"
depends on IOMMU && DEBUG_KERNEL
depends on GART_IOMMU && DEBUG_KERNEL
depends on X86_64
help
Force the IOMMU to on even when you have less than 4GB of

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@ -479,7 +479,7 @@ config HPET_EMULATE_RTC
# Mark as embedded because too many people got it wrong.
# The code disables itself when not needed.
config IOMMU
config GART_IOMMU
bool "GART IOMMU support" if EMBEDDED
default y
select SWIOTLB
@ -687,7 +687,7 @@ source kernel/Kconfig.hz
config K8_NB
def_bool y
depends on AGP_AMD64 || IOMMU || (PCI && NUMA)
depends on AGP_AMD64 || GART_IOMMU || (PCI && NUMA)
endmenu

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@ -170,7 +170,7 @@ CONFIG_HOTPLUG_CPU=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_HPET_TIMER=y
CONFIG_HPET_EMULATE_RTC=y
CONFIG_IOMMU=y
CONFIG_GART_IOMMU=y
# CONFIG_CALGARY_IOMMU is not set
CONFIG_SWIOTLB=y
CONFIG_X86_MCE=y

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@ -25,7 +25,7 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump_64.o
obj-$(CONFIG_PM) += suspend_64.o
obj-$(CONFIG_HIBERNATION) += suspend_asm_64.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_IOMMU) += pci-gart_64.o aperture_64.o
obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o
obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o
obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o
obj-$(CONFIG_KPROBES) += kprobes_64.o

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@ -17,13 +17,13 @@
#include <asm/io_apic.h>
#include <asm/apic.h>
#ifdef CONFIG_IOMMU
#ifdef CONFIG_GART_IOMMU
#include <asm/gart.h>
#endif
static void __init via_bugs(void)
{
#ifdef CONFIG_IOMMU
#ifdef CONFIG_GART_IOMMU
if ((end_pfn > MAX_DMA32_PFN || force_iommu) &&
!iommu_aperture_allowed) {
printk(KERN_INFO

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@ -275,7 +275,7 @@ __init int iommu_setup(char *p)
swiotlb = 1;
#endif
#ifdef CONFIG_IOMMU
#ifdef CONFIG_GART_IOMMU
gart_parse_options(p);
#endif
@ -298,7 +298,7 @@ void __init pci_iommu_alloc(void)
* The order of these functions is important for
* fall-back/fail-over reasons
*/
#ifdef CONFIG_IOMMU
#ifdef CONFIG_GART_IOMMU
iommu_hole_init();
#endif
@ -321,7 +321,7 @@ static int __init pci_iommu_init(void)
intel_iommu_init();
#ifdef CONFIG_IOMMU
#ifdef CONFIG_GART_IOMMU
gart_iommu_init();
#endif

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@ -56,9 +56,9 @@ config AGP_AMD
X on AMD Irongate, 761, and 762 chipsets.
config AGP_AMD64
tristate "AMD Opteron/Athlon64 on-CPU GART support" if !IOMMU
tristate "AMD Opteron/Athlon64 on-CPU GART support" if !GART_IOMMU
depends on AGP && X86
default y if IOMMU
default y if GART_IOMMU
help
This option gives you AGP support for the GLX component of
X using the on-CPU northbridge of the AMD Athlon64/Opteron CPUs.

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@ -787,7 +787,7 @@ static void __exit agp_amd64_cleanup(void)
/* On AMD64 the PCI driver needs to initialize this driver early
for the IOMMU, so it has to be called via a backdoor. */
#ifndef CONFIG_IOMMU
#ifndef CONFIG_GART_IOMMU
module_init(agp_amd64_init);
module_exit(agp_amd64_cleanup);
#endif

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@ -434,7 +434,7 @@ int usb_sg_init (
if (dma) {
io->urbs [i]->transfer_dma = sg_dma_address (sg + i);
len = sg_dma_len (sg + i);
#if defined(CONFIG_HIGHMEM) || defined(CONFIG_IOMMU)
#if defined(CONFIG_HIGHMEM) || defined(CONFIG_GART_IOMMU)
io->urbs[i]->transfer_buffer = NULL;
#else
io->urbs[i]->transfer_buffer = sg_virt(&sg[i]);

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@ -5,7 +5,7 @@ extern void pci_iommu_shutdown(void);
extern void no_iommu_init(void);
extern int force_iommu, no_iommu;
extern int iommu_detected;
#ifdef CONFIG_IOMMU
#ifdef CONFIG_GART_IOMMU
extern void gart_iommu_init(void);
extern void gart_iommu_shutdown(void);
extern void __init gart_parse_options(char *);

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@ -37,7 +37,7 @@ extern int iommu_setup(char *opt);
*/
#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
#if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
#if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
dma_addr_t ADDR_NAME;