[ARM] 4241/1: Define mb() as compiler barrier on a uniprocessor system
Currently, the mb() is defined as a DMB operation on ARMv6, even for UP systems. This patch defines mb() as a compiler barrier only. For the SMP case, the smp_* variants should be used anyway and the patch defines them as DMB. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -167,11 +167,25 @@ extern unsigned int user_debug;
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: : "r" (0) : "memory")
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#define dmb() __asm__ __volatile__ ("" : : : "memory")
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#endif
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#define mb() dmb()
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#define rmb() mb()
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#define wmb() mb()
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#define mb() barrier()
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#define rmb() barrier()
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#define wmb() barrier()
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#define read_barrier_depends() do { } while(0)
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#ifdef CONFIG_SMP
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#define smp_mb() dmb()
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#define smp_rmb() dmb()
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#define smp_wmb() dmb()
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#define smp_read_barrier_depends() read_barrier_depends()
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#else
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#define smp_read_barrier_depends() read_barrier_depends()
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#endif /* CONFIG_SMP */
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#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
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#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
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extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
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@ -243,22 +257,6 @@ static inline void sched_cacheflush(void)
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{
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}
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#ifdef CONFIG_SMP
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#define smp_mb() mb()
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#define smp_rmb() rmb()
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#define smp_wmb() wmb()
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#define smp_read_barrier_depends() read_barrier_depends()
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#else
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#define smp_read_barrier_depends() do { } while(0)
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#endif /* CONFIG_SMP */
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#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
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/*
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* On the StrongARM, "swp" is terminally broken since it bypasses the
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