dt-bindings: firmware: imx-scu: remove unused resources from scu resource table
Removes below resources which were defined during pre-silicon phase and the real silicons do NOT have them, they have never been used, latest system controller firmware also removed them: IMX_SC_R_DC_0_CAPTURE0 IMX_SC_R_DC_0_CAPTURE1 IMX_SC_R_DC_0_INTEGRAL0 IMX_SC_R_DC_0_INTEGRAL1 IMX_SC_R_DC_0_FRAC1 IMX_SC_R_DC_1_CAPTURE0 IMX_SC_R_DC_1_CAPTURE1 IMX_SC_R_DC_1_INTEGRAL0 IMX_SC_R_DC_1_INTEGRAL1 IMX_SC_R_DC_1_FRAC1 IMX_SC_R_GPU_3_PID0 IMX_SC_R_M4_0_SIM IMX_SC_R_M4_0_WDOG IMX_SC_R_M4_1_SIM IMX_SC_R_M4_1_WDOG Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -36,15 +36,10 @@
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#define IMX_SC_R_DC_0_BLIT1 20
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#define IMX_SC_R_DC_0_BLIT2 21
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#define IMX_SC_R_DC_0_BLIT_OUT 22
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#define IMX_SC_R_DC_0_CAPTURE0 23
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#define IMX_SC_R_DC_0_CAPTURE1 24
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#define IMX_SC_R_DC_0_WARP 25
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#define IMX_SC_R_DC_0_INTEGRAL0 26
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#define IMX_SC_R_DC_0_INTEGRAL1 27
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#define IMX_SC_R_DC_0_VIDEO0 28
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#define IMX_SC_R_DC_0_VIDEO1 29
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#define IMX_SC_R_DC_0_FRAC0 30
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#define IMX_SC_R_DC_0_FRAC1 31
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#define IMX_SC_R_DC_0 32
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#define IMX_SC_R_GPU_2_PID0 33
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#define IMX_SC_R_DC_0_PLL_0 34
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@ -53,17 +48,11 @@
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#define IMX_SC_R_DC_1_BLIT1 37
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#define IMX_SC_R_DC_1_BLIT2 38
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#define IMX_SC_R_DC_1_BLIT_OUT 39
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#define IMX_SC_R_DC_1_CAPTURE0 40
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#define IMX_SC_R_DC_1_CAPTURE1 41
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#define IMX_SC_R_DC_1_WARP 42
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#define IMX_SC_R_DC_1_INTEGRAL0 43
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#define IMX_SC_R_DC_1_INTEGRAL1 44
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#define IMX_SC_R_DC_1_VIDEO0 45
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#define IMX_SC_R_DC_1_VIDEO1 46
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#define IMX_SC_R_DC_1_FRAC0 47
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#define IMX_SC_R_DC_1_FRAC1 48
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#define IMX_SC_R_DC_1 49
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#define IMX_SC_R_GPU_3_PID0 50
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#define IMX_SC_R_DC_1_PLL_0 51
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#define IMX_SC_R_DC_1_PLL_1 52
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#define IMX_SC_R_SPI_0 53
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@ -303,8 +292,6 @@
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#define IMX_SC_R_M4_0_UART 287
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#define IMX_SC_R_M4_0_I2C 288
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#define IMX_SC_R_M4_0_INTMUX 289
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#define IMX_SC_R_M4_0_SIM 290
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#define IMX_SC_R_M4_0_WDOG 291
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#define IMX_SC_R_M4_0_MU_0B 292
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#define IMX_SC_R_M4_0_MU_0A0 293
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#define IMX_SC_R_M4_0_MU_0A1 294
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@ -323,8 +310,6 @@
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#define IMX_SC_R_M4_1_UART 307
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#define IMX_SC_R_M4_1_I2C 308
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#define IMX_SC_R_M4_1_INTMUX 309
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#define IMX_SC_R_M4_1_SIM 310
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#define IMX_SC_R_M4_1_WDOG 311
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#define IMX_SC_R_M4_1_MU_0B 312
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#define IMX_SC_R_M4_1_MU_0A0 313
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#define IMX_SC_R_M4_1_MU_0A1 314
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