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powerpc/64s/exception: windup use r9 consistently to restore SPRs 

Trivial code change, r3->r9.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin 2019-06-28 15:33:23 +10:00 committed by Michael Ellerman
parent fbc50063a2
commit 9592b29a9c
1 changed files with 6 additions and 6 deletions
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12
arch/powerpc/kernel/exceptions-64s.S
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@ -909,8 +909,8 @@ EXC_COMMON_BEGIN(system_reset_common)
/* Move original SRR0 and SRR1 into the respective regs */
ld r9,_MSR(r1)
mtspr SPRN_SRR1,r9
ld r3,_NIP(r1)
mtspr SPRN_SRR0,r3
ld r9,_NIP(r1)
mtspr SPRN_SRR0,r9
ld r9,_CTR(r1)
mtctr r9
ld r9,_XER(r1)
@ -1083,8 +1083,8 @@ EXC_COMMON_BEGIN(machine_check_common)
/* Move original SRR0 and SRR1 into the respective regs */ \
ld r9,_MSR(r1); \
mtspr SPRN_SRR1,r9; \
ld r3,_NIP(r1); \
mtspr SPRN_SRR0,r3; \
ld r9,_NIP(r1); \
mtspr SPRN_SRR0,r9; \
ld r9,_CTR(r1); \
mtctr r9; \
ld r9,_XER(r1); \
@ -1786,8 +1786,8 @@ TRAMP_REAL_BEGIN(hmi_exception_early)
/* Move original HSRR0 and HSRR1 into the respective regs */
ld r9,_MSR(r1)
mtspr SPRN_HSRR1,r9
ld r3,_NIP(r1)
mtspr SPRN_HSRR0,r3
ld r9,_NIP(r1)
mtspr SPRN_HSRR0,r9
ld r9,_CTR(r1)
mtctr r9
ld r9,_XER(r1)