drm/amdgpu: load MEC ucode manually on iceland
The smc doesn't handle it. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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@ -3851,12 +3851,18 @@ static int gfx_v8_0_cp_resume(struct amdgpu_device *adev)
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if (r)
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return -EINVAL;
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if (adev->asic_type == CHIP_TOPAZ) {
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r = gfx_v8_0_cp_compute_load_microcode(adev);
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if (r)
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return r;
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} else {
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r = adev->smu.smumgr_funcs->check_fw_load_finish(adev,
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AMDGPU_UCODE_ID_CP_MEC1);
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if (r)
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return -EINVAL;
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}
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}
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}
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r = gfx_v8_0_cp_gfx_resume(adev);
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if (r)
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