drm/amdgpu: load MEC ucode manually on iceland

The smc doesn't handle it.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
This commit is contained in:
Alex Deucher 2016-02-02 16:22:15 -05:00
parent 97dde76a30
commit 951e09624a
1 changed files with 10 additions and 4 deletions

View File

@ -3851,12 +3851,18 @@ static int gfx_v8_0_cp_resume(struct amdgpu_device *adev)
if (r)
return -EINVAL;
if (adev->asic_type == CHIP_TOPAZ) {
r = gfx_v8_0_cp_compute_load_microcode(adev);
if (r)
return r;
} else {
r = adev->smu.smumgr_funcs->check_fw_load_finish(adev,
AMDGPU_UCODE_ID_CP_MEC1);
if (r)
return -EINVAL;
}
}
}
r = gfx_v8_0_cp_gfx_resume(adev);
if (r)