dmaengine-fixes for 3.4-rc3
1/ regression fix for Xen as it now trips over a broken assumption about the dma address size on 32-bit builds 2/ new quirk for netdma to ignore dma channels that cannot meet netdma alignment requirements 3/ fixes for two long standing issues in ioatdma (ring size overflow) and iop-adma (potential stack corruption) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJPhIfhAAoJEB7SkWpmfYgCguIQAL4qF+RC9/JggSHIjfOrYiPd yboV80GqqQHHBwy8hfZVUrIEPMebvD/xUIk6iUQNXR+6EA8Ln0jukvQMpWNnI+Cc TXgA5Ok70an4PD1MqnCsWyCJjsyPyhprbRHurxBcesf+y96POJxhING0rcKvft50 mvYnbtrkYe9M9x3b8TBGc0JaTVeL29Ck3FtkTz4uUktbkhRNfCcfEd28NRQpf8MB vkjbjRGBQmGsnKxYCaEhlF1GPJyTlYjg4BBWtseJgb2R9s7tvJrkotFea/NmSfjq XCuVKjpiFp3YyJuxJERWdwqRWvyAZFfcYyZX440nG0b7GBgSn+T7A9XhUs8vMboi tLwoDfBbJDlKMaFpHex7Z6RtZZmVl3gWDNZTqpG44n4pabd4RPip04f0k7Wfs+cp tzU9hGAOvgsZ8w4/JgxH8YJOZbIGzbDGOA1IhWcbxIbmFTblMiFnV3TC7qfhoRbR 8qtScIE7bUck2MYVlMMn9utd9tvKFa6HNgo41+f78/4+U7zQ/VrsbA/DWQct40R5 5k+EEvyYFUzIXn79E0GVN5h4NHH5gfAs3MZ7jIgwgHedBp4Ki68XYKNu+pIV3YwG CFTPn1mVOXnCdt+fsjG5tL9Jecx1Mij6w3nWU93ZU6cHmC77YmU+DLxPIGuyR1a2 EmpObwfq5peXzkgQpEsB =F3IR -----END PGP SIGNATURE----- Merge tag 'dmaengine-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine Pull dmaengine fixes from Dan Williams: 1/ regression fix for Xen as it now trips over a broken assumption about the dma address size on 32-bit builds 2/ new quirk for netdma to ignore dma channels that cannot meet netdma alignment requirements 3/ fixes for two long standing issues in ioatdma (ring size overflow) and iop-adma (potential stack corruption) * tag 'dmaengine-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine: netdma: adding alignment check for NETDMA ops ioatdma: DMA copy alignment needed to address IOAT DMA silicon errata ioat: ring size variables need to be 32bit to avoid overflow iop-adma: Corrected array overflow in RAID6 Xscale(R) test. ioat: fix size of 'completion' for Xen
This commit is contained in:
commit
94fb175c04
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@ -332,6 +332,20 @@ struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
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}
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EXPORT_SYMBOL(dma_find_channel);
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/*
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* net_dma_find_channel - find a channel for net_dma
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* net_dma has alignment requirements
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*/
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struct dma_chan *net_dma_find_channel(void)
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{
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struct dma_chan *chan = dma_find_channel(DMA_MEMCPY);
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if (chan && !is_dma_copy_aligned(chan->device, 1, 1, 1))
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return NULL;
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return chan;
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}
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EXPORT_SYMBOL(net_dma_find_channel);
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/**
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* dma_issue_pending_all - flush all pending operations across all channels
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*/
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@ -546,9 +546,9 @@ void ioat_dma_unmap(struct ioat_chan_common *chan, enum dma_ctrl_flags flags,
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PCI_DMA_TODEVICE, flags, 0);
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}
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unsigned long ioat_get_current_completion(struct ioat_chan_common *chan)
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dma_addr_t ioat_get_current_completion(struct ioat_chan_common *chan)
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{
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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u64 completion;
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completion = *chan->completion;
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@ -569,7 +569,7 @@ unsigned long ioat_get_current_completion(struct ioat_chan_common *chan)
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}
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bool ioat_cleanup_preamble(struct ioat_chan_common *chan,
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unsigned long *phys_complete)
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dma_addr_t *phys_complete)
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{
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*phys_complete = ioat_get_current_completion(chan);
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if (*phys_complete == chan->last_completion)
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@ -580,14 +580,14 @@ bool ioat_cleanup_preamble(struct ioat_chan_common *chan,
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return true;
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}
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static void __cleanup(struct ioat_dma_chan *ioat, unsigned long phys_complete)
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static void __cleanup(struct ioat_dma_chan *ioat, dma_addr_t phys_complete)
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{
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struct ioat_chan_common *chan = &ioat->base;
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struct list_head *_desc, *n;
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struct dma_async_tx_descriptor *tx;
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dev_dbg(to_dev(chan), "%s: phys_complete: %lx\n",
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__func__, phys_complete);
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dev_dbg(to_dev(chan), "%s: phys_complete: %llx\n",
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__func__, (unsigned long long) phys_complete);
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list_for_each_safe(_desc, n, &ioat->used_desc) {
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struct ioat_desc_sw *desc;
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@ -652,7 +652,7 @@ static void __cleanup(struct ioat_dma_chan *ioat, unsigned long phys_complete)
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static void ioat1_cleanup(struct ioat_dma_chan *ioat)
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{
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struct ioat_chan_common *chan = &ioat->base;
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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prefetch(chan->completion);
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@ -698,7 +698,7 @@ static void ioat1_timer_event(unsigned long data)
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mod_timer(&chan->timer, jiffies + COMPLETION_TIMEOUT);
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spin_unlock_bh(&ioat->desc_lock);
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} else if (test_bit(IOAT_COMPLETION_PENDING, &chan->state)) {
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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spin_lock_bh(&ioat->desc_lock);
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/* if we haven't made progress and we have already
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@ -88,7 +88,7 @@ struct ioatdma_device {
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struct ioat_chan_common {
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struct dma_chan common;
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void __iomem *reg_base;
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unsigned long last_completion;
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dma_addr_t last_completion;
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spinlock_t cleanup_lock;
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unsigned long state;
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#define IOAT_COMPLETION_PENDING 0
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@ -310,7 +310,7 @@ int __devinit ioat_dma_self_test(struct ioatdma_device *device);
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void __devexit ioat_dma_remove(struct ioatdma_device *device);
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struct dca_provider * __devinit ioat_dca_init(struct pci_dev *pdev,
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void __iomem *iobase);
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unsigned long ioat_get_current_completion(struct ioat_chan_common *chan);
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dma_addr_t ioat_get_current_completion(struct ioat_chan_common *chan);
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void ioat_init_channel(struct ioatdma_device *device,
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struct ioat_chan_common *chan, int idx);
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enum dma_status ioat_dma_tx_status(struct dma_chan *c, dma_cookie_t cookie,
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@ -318,7 +318,7 @@ enum dma_status ioat_dma_tx_status(struct dma_chan *c, dma_cookie_t cookie,
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void ioat_dma_unmap(struct ioat_chan_common *chan, enum dma_ctrl_flags flags,
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size_t len, struct ioat_dma_descriptor *hw);
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bool ioat_cleanup_preamble(struct ioat_chan_common *chan,
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unsigned long *phys_complete);
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dma_addr_t *phys_complete);
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void ioat_kobject_add(struct ioatdma_device *device, struct kobj_type *type);
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void ioat_kobject_del(struct ioatdma_device *device);
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extern const struct sysfs_ops ioat_sysfs_ops;
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@ -128,7 +128,7 @@ static void ioat2_start_null_desc(struct ioat2_dma_chan *ioat)
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spin_unlock_bh(&ioat->prep_lock);
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}
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static void __cleanup(struct ioat2_dma_chan *ioat, unsigned long phys_complete)
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static void __cleanup(struct ioat2_dma_chan *ioat, dma_addr_t phys_complete)
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{
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struct ioat_chan_common *chan = &ioat->base;
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struct dma_async_tx_descriptor *tx;
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@ -179,7 +179,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, unsigned long phys_complete)
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static void ioat2_cleanup(struct ioat2_dma_chan *ioat)
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{
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struct ioat_chan_common *chan = &ioat->base;
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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spin_lock_bh(&chan->cleanup_lock);
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if (ioat_cleanup_preamble(chan, &phys_complete))
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@ -260,7 +260,7 @@ int ioat2_reset_sync(struct ioat_chan_common *chan, unsigned long tmo)
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static void ioat2_restart_channel(struct ioat2_dma_chan *ioat)
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{
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struct ioat_chan_common *chan = &ioat->base;
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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ioat2_quiesce(chan, 0);
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if (ioat_cleanup_preamble(chan, &phys_complete))
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@ -275,7 +275,7 @@ void ioat2_timer_event(unsigned long data)
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struct ioat_chan_common *chan = &ioat->base;
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if (test_bit(IOAT_COMPLETION_PENDING, &chan->state)) {
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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u64 status;
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status = ioat_chansts(chan);
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@ -572,9 +572,9 @@ bool reshape_ring(struct ioat2_dma_chan *ioat, int order)
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*/
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struct ioat_chan_common *chan = &ioat->base;
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struct dma_chan *c = &chan->common;
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const u16 curr_size = ioat2_ring_size(ioat);
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const u32 curr_size = ioat2_ring_size(ioat);
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const u16 active = ioat2_ring_active(ioat);
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const u16 new_size = 1 << order;
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const u32 new_size = 1 << order;
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struct ioat_ring_ent **ring;
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u16 i;
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@ -74,7 +74,7 @@ static inline struct ioat2_dma_chan *to_ioat2_chan(struct dma_chan *c)
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return container_of(chan, struct ioat2_dma_chan, base);
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}
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static inline u16 ioat2_ring_size(struct ioat2_dma_chan *ioat)
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static inline u32 ioat2_ring_size(struct ioat2_dma_chan *ioat)
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{
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return 1 << ioat->alloc_order;
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}
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return CIRC_CNT(ioat->head, ioat->issued, ioat2_ring_size(ioat));
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}
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static inline u16 ioat2_ring_space(struct ioat2_dma_chan *ioat)
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static inline u32 ioat2_ring_space(struct ioat2_dma_chan *ioat)
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{
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return ioat2_ring_size(ioat) - ioat2_ring_active(ioat);
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}
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@ -257,7 +257,7 @@ static bool desc_has_ext(struct ioat_ring_ent *desc)
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* The difference from the dma_v2.c __cleanup() is that this routine
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* handles extended descriptors and dma-unmapping raid operations.
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*/
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static void __cleanup(struct ioat2_dma_chan *ioat, unsigned long phys_complete)
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static void __cleanup(struct ioat2_dma_chan *ioat, dma_addr_t phys_complete)
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{
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struct ioat_chan_common *chan = &ioat->base;
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struct ioat_ring_ent *desc;
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@ -314,7 +314,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, unsigned long phys_complete)
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static void ioat3_cleanup(struct ioat2_dma_chan *ioat)
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{
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struct ioat_chan_common *chan = &ioat->base;
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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spin_lock_bh(&chan->cleanup_lock);
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if (ioat_cleanup_preamble(chan, &phys_complete))
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static void ioat3_restart_channel(struct ioat2_dma_chan *ioat)
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{
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struct ioat_chan_common *chan = &ioat->base;
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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ioat2_quiesce(chan, 0);
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if (ioat_cleanup_preamble(chan, &phys_complete))
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struct ioat_chan_common *chan = &ioat->base;
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if (test_bit(IOAT_COMPLETION_PENDING, &chan->state)) {
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unsigned long phys_complete;
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dma_addr_t phys_complete;
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u64 status;
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status = ioat_chansts(chan);
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return ioat2_reset_sync(chan, msecs_to_jiffies(200));
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}
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static bool is_jf_ioat(struct pci_dev *pdev)
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{
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switch (pdev->device) {
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case PCI_DEVICE_ID_INTEL_IOAT_JSF0:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF1:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF2:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF3:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF4:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF5:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF6:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF7:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF8:
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case PCI_DEVICE_ID_INTEL_IOAT_JSF9:
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return true;
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default:
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return false;
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}
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}
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static bool is_snb_ioat(struct pci_dev *pdev)
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{
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switch (pdev->device) {
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case PCI_DEVICE_ID_INTEL_IOAT_SNB0:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB1:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB2:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB3:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB4:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB5:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB6:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB7:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB8:
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case PCI_DEVICE_ID_INTEL_IOAT_SNB9:
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return true;
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default:
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return false;
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}
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}
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int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
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{
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struct pci_dev *pdev = device->pdev;
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@ -1169,6 +1207,9 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
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dma->device_alloc_chan_resources = ioat2_alloc_chan_resources;
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dma->device_free_chan_resources = ioat2_free_chan_resources;
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if (is_jf_ioat(pdev) || is_snb_ioat(pdev))
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dma->copy_align = 6;
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dma_cap_set(DMA_INTERRUPT, dma->cap_mask);
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dma->device_prep_dma_interrupt = ioat3_prep_interrupt_lock;
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@ -1252,8 +1252,8 @@ iop_adma_pq_zero_sum_self_test(struct iop_adma_device *device)
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struct page **pq_hw = &pq[IOP_ADMA_NUM_SRC_TEST+2];
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/* address conversion buffers (dma_map / page_address) */
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void *pq_sw[IOP_ADMA_NUM_SRC_TEST+2];
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dma_addr_t pq_src[IOP_ADMA_NUM_SRC_TEST];
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dma_addr_t pq_dest[2];
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dma_addr_t pq_src[IOP_ADMA_NUM_SRC_TEST+2];
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dma_addr_t *pq_dest = &pq_src[IOP_ADMA_NUM_SRC_TEST];
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int i;
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struct dma_async_tx_descriptor *tx;
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@ -974,6 +974,7 @@ int dma_async_device_register(struct dma_device *device);
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void dma_async_device_unregister(struct dma_device *device);
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void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
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struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
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struct dma_chan *net_dma_find_channel(void);
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#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
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/* --- Helper iov-locking functions --- */
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@ -1452,7 +1452,7 @@ int tcp_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
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if ((available < target) &&
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(len > sysctl_tcp_dma_copybreak) && !(flags & MSG_PEEK) &&
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!sysctl_tcp_low_latency &&
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dma_find_channel(DMA_MEMCPY)) {
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net_dma_find_channel()) {
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preempt_enable_no_resched();
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tp->ucopy.pinned_list =
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dma_pin_iovec_pages(msg->msg_iov, len);
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@ -1667,7 +1667,7 @@ do_prequeue:
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if (!(flags & MSG_TRUNC)) {
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#ifdef CONFIG_NET_DMA
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if (!tp->ucopy.dma_chan && tp->ucopy.pinned_list)
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tp->ucopy.dma_chan = dma_find_channel(DMA_MEMCPY);
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tp->ucopy.dma_chan = net_dma_find_channel();
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if (tp->ucopy.dma_chan) {
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tp->ucopy.dma_cookie = dma_skb_copy_datagram_iovec(
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|
@ -5225,7 +5225,7 @@ static int tcp_dma_try_early_copy(struct sock *sk, struct sk_buff *skb,
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return 0;
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if (!tp->ucopy.dma_chan && tp->ucopy.pinned_list)
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tp->ucopy.dma_chan = dma_find_channel(DMA_MEMCPY);
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tp->ucopy.dma_chan = net_dma_find_channel();
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if (tp->ucopy.dma_chan && skb_csum_unnecessary(skb)) {
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|
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|
@ -1730,7 +1730,7 @@ process:
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#ifdef CONFIG_NET_DMA
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struct tcp_sock *tp = tcp_sk(sk);
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if (!tp->ucopy.dma_chan && tp->ucopy.pinned_list)
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tp->ucopy.dma_chan = dma_find_channel(DMA_MEMCPY);
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tp->ucopy.dma_chan = net_dma_find_channel();
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if (tp->ucopy.dma_chan)
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ret = tcp_v4_do_rcv(sk, skb);
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else
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|
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|
@ -1645,7 +1645,7 @@ process:
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#ifdef CONFIG_NET_DMA
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struct tcp_sock *tp = tcp_sk(sk);
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if (!tp->ucopy.dma_chan && tp->ucopy.pinned_list)
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tp->ucopy.dma_chan = dma_find_channel(DMA_MEMCPY);
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tp->ucopy.dma_chan = net_dma_find_channel();
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if (tp->ucopy.dma_chan)
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ret = tcp_v6_do_rcv(sk, skb);
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else
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||||
|
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Loading…
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