drm/radeon/dpm: add debugfs support for CI

This allows you to look at the current DPM state via debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-07-15 17:34:33 -04:00
parent cc8dbbb4f6
commit 94b4adc5ae
4 changed files with 26 additions and 0 deletions

View File

@ -27,6 +27,7 @@
#include "r600_dpm.h" #include "r600_dpm.h"
#include "ci_dpm.h" #include "ci_dpm.h"
#include "atom.h" #include "atom.h"
#include <linux/seq_file.h>
#define MC_CG_ARB_FREQ_F0 0x0a #define MC_CG_ARB_FREQ_F0 0x0a
#define MC_CG_ARB_FREQ_F1 0x0b #define MC_CG_ARB_FREQ_F1 0x0b
@ -4965,6 +4966,16 @@ int ci_dpm_init(struct radeon_device *rdev)
return 0; return 0;
} }
void ci_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
struct seq_file *m)
{
u32 sclk = ci_get_average_sclk_freq(rdev);
u32 mclk = ci_get_average_mclk_freq(rdev);
seq_printf(m, "power level avg sclk: %u mclk: %u\n",
sclk, mclk);
}
void ci_dpm_print_power_state(struct radeon_device *rdev, void ci_dpm_print_power_state(struct radeon_device *rdev,
struct radeon_ps *rps) struct radeon_ps *rps)
{ {

View File

@ -110,6 +110,14 @@
# define RESET_SCLK_CNT (1 << 5) # define RESET_SCLK_CNT (1 << 5)
# define DYNAMIC_PM_EN (1 << 21) # define DYNAMIC_PM_EN (1 << 21)
#define TARGET_AND_CURRENT_PROFILE_INDEX 0xC0200014
# define CURRENT_STATE_MASK (0xf << 4)
# define CURRENT_STATE_SHIFT 4
# define CURR_MCLK_INDEX_MASK (0xf << 8)
# define CURR_MCLK_INDEX_SHIFT 8
# define CURR_SCLK_INDEX_MASK (0x1f << 16)
# define CURR_SCLK_INDEX_SHIFT 16
#define CG_SSP 0xC0200044 #define CG_SSP 0xC0200044
# define SST(x) ((x) << 0) # define SST(x) ((x) << 0)
# define SST_MASK (0xffff << 0) # define SST_MASK (0xffff << 0)
@ -126,6 +134,10 @@
# define DISP_GAP_MCHG(x) ((x) << 24) # define DISP_GAP_MCHG(x) ((x) << 24)
# define DISP_GAP_MCHG_MASK (3 << 24) # define DISP_GAP_MCHG_MASK (3 << 24)
#define TARGET_AND_CURRENT_PROFILE_INDEX_1 0xC02000F0
# define CURR_PCIE_INDEX_MASK (0xf << 24)
# define CURR_PCIE_INDEX_SHIFT 24
#define CG_ULV_PARAMETER 0xC0200158 #define CG_ULV_PARAMETER 0xC0200158
#define CG_FTV_0 0xC02001A8 #define CG_FTV_0 0xC02001A8

View File

@ -2467,6 +2467,7 @@ static struct radeon_asic ci_asic = {
.get_sclk = &ci_dpm_get_sclk, .get_sclk = &ci_dpm_get_sclk,
.get_mclk = &ci_dpm_get_mclk, .get_mclk = &ci_dpm_get_mclk,
.print_power_state = &ci_dpm_print_power_state, .print_power_state = &ci_dpm_print_power_state,
.debugfs_print_current_performance_level = &ci_dpm_debugfs_print_current_performance_level,
}, },
.pflip = { .pflip = {
.pre_page_flip = &evergreen_pre_page_flip, .pre_page_flip = &evergreen_pre_page_flip,

View File

@ -763,6 +763,8 @@ u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low);
u32 ci_dpm_get_mclk(struct radeon_device *rdev, bool low); u32 ci_dpm_get_mclk(struct radeon_device *rdev, bool low);
void ci_dpm_print_power_state(struct radeon_device *rdev, void ci_dpm_print_power_state(struct radeon_device *rdev,
struct radeon_ps *ps); struct radeon_ps *ps);
void ci_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
struct seq_file *m);
int kv_dpm_init(struct radeon_device *rdev); int kv_dpm_init(struct radeon_device *rdev);
int kv_dpm_enable(struct radeon_device *rdev); int kv_dpm_enable(struct radeon_device *rdev);