Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "Various assorted fixes: - a couple of patches from Mark Rutland to resolve an errata with Cortex-A15 CPUs. - fix cpuidle for the CPU part ID changes in the last merge window - add support for a relocation which ARM binutils is generating in some circumstances" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part number ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strex ARM: 8128/1: abort: don't clear the exclusive monitors ARM: 8127/1: module: add support for R_ARM_TARGET1 relocations
This commit is contained in:
commit
94559a4a81
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@ -472,7 +472,6 @@ static inline void __sync_cache_range_r(volatile void *p, size_t size)
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"mcr p15, 0, r0, c1, c0, 0 @ set SCTLR \n\t" \
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"mcr p15, 0, r0, c1, c0, 0 @ set SCTLR \n\t" \
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"isb \n\t" \
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"isb \n\t" \
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"bl v7_flush_dcache_"__stringify(level)" \n\t" \
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"bl v7_flush_dcache_"__stringify(level)" \n\t" \
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"clrex \n\t" \
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"mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \
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"mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \
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"bic r0, r0, #(1 << 6) @ disable local coherency \n\t" \
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"bic r0, r0, #(1 << 6) @ disable local coherency \n\t" \
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"mcr p15, 0, r0, c1, c0, 1 @ set ACTLR \n\t" \
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"mcr p15, 0, r0, c1, c0, 1 @ set ACTLR \n\t" \
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@ -74,6 +74,7 @@
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#define ARM_CPU_PART_CORTEX_A12 0x4100c0d0
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#define ARM_CPU_PART_CORTEX_A12 0x4100c0d0
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#define ARM_CPU_PART_CORTEX_A17 0x4100c0e0
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#define ARM_CPU_PART_CORTEX_A17 0x4100c0e0
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#define ARM_CPU_PART_CORTEX_A15 0x4100c0f0
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#define ARM_CPU_PART_CORTEX_A15 0x4100c0f0
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#define ARM_CPU_PART_MASK 0xff00fff0
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#define ARM_CPU_XSCALE_ARCH_MASK 0xe000
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#define ARM_CPU_XSCALE_ARCH_MASK 0xe000
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#define ARM_CPU_XSCALE_ARCH_V1 0x2000
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#define ARM_CPU_XSCALE_ARCH_V1 0x2000
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@ -179,7 +180,7 @@ static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
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*/
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*/
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static inline unsigned int __attribute_const__ read_cpuid_part(void)
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static inline unsigned int __attribute_const__ read_cpuid_part(void)
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{
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{
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return read_cpuid_id() & 0xff00fff0;
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return read_cpuid_id() & ARM_CPU_PART_MASK;
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}
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}
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static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void)
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static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void)
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@ -50,6 +50,7 @@ typedef struct user_fp elf_fpregset_t;
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#define R_ARM_ABS32 2
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#define R_ARM_ABS32 2
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#define R_ARM_CALL 28
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#define R_ARM_CALL 28
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#define R_ARM_JUMP24 29
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#define R_ARM_JUMP24 29
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#define R_ARM_TARGET1 38
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#define R_ARM_V4BX 40
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#define R_ARM_V4BX 40
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#define R_ARM_PREL31 42
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#define R_ARM_PREL31 42
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#define R_ARM_MOVW_ABS_NC 43
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#define R_ARM_MOVW_ABS_NC 43
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@ -8,6 +8,7 @@
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#include <linux/cpumask.h>
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#include <linux/cpumask.h>
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#include <linux/err.h>
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#include <linux/err.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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#include <asm/cputype.h>
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/*
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/*
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@ -25,6 +26,20 @@ static inline bool is_smp(void)
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#endif
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#endif
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}
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}
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/**
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* smp_cpuid_part() - return part id for a given cpu
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* @cpu: logical cpu id.
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*
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* Return: part id of logical cpu passed as argument.
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*/
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static inline unsigned int smp_cpuid_part(int cpu)
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{
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struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
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return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
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read_cpuid_part();
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}
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/* all SMP configurations have the extended CPUID registers */
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/* all SMP configurations have the extended CPUID registers */
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#ifndef CONFIG_MMU
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#ifndef CONFIG_MMU
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#define tlb_ops_need_broadcast() 0
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#define tlb_ops_need_broadcast() 0
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@ -208,26 +208,21 @@
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#endif
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#endif
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.endif
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.endif
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msr spsr_cxsf, \rpsr
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msr spsr_cxsf, \rpsr
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#if defined(CONFIG_CPU_V6)
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#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
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ldr r0, [sp]
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@ We must avoid clrex due to Cortex-A15 erratum #830321
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strex r1, r2, [sp] @ clear the exclusive monitor
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sub r0, sp, #4 @ uninhabited address
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ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
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strex r1, r2, [r0] @ clear the exclusive monitor
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#elif defined(CONFIG_CPU_32v6K)
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clrex @ clear the exclusive monitor
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ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
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#else
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ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
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#endif
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#endif
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ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
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.endm
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.endm
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.macro restore_user_regs, fast = 0, offset = 0
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.macro restore_user_regs, fast = 0, offset = 0
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ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
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ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
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ldr lr, [sp, #\offset + S_PC]! @ get pc
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ldr lr, [sp, #\offset + S_PC]! @ get pc
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msr spsr_cxsf, r1 @ save in spsr_svc
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msr spsr_cxsf, r1 @ save in spsr_svc
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#if defined(CONFIG_CPU_V6)
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#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
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@ We must avoid clrex due to Cortex-A15 erratum #830321
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strex r1, r2, [sp] @ clear the exclusive monitor
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strex r1, r2, [sp] @ clear the exclusive monitor
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#elif defined(CONFIG_CPU_32v6K)
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clrex @ clear the exclusive monitor
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#endif
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#endif
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.if \fast
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.if \fast
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ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
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ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
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@ -261,7 +256,10 @@
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.endif
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.endif
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ldr lr, [sp, #S_SP] @ top of the stack
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ldr lr, [sp, #S_SP] @ top of the stack
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ldrd r0, r1, [sp, #S_LR] @ calling lr and pc
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ldrd r0, r1, [sp, #S_LR] @ calling lr and pc
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clrex @ clear the exclusive monitor
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@ We must avoid clrex due to Cortex-A15 erratum #830321
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strex r2, r1, [sp, #S_LR] @ clear the exclusive monitor
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stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context
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stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context
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ldmia sp, {r0 - r12}
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ldmia sp, {r0 - r12}
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mov sp, lr
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mov sp, lr
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@ -282,13 +280,16 @@
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.endm
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.endm
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#else /* ifdef CONFIG_CPU_V7M */
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#else /* ifdef CONFIG_CPU_V7M */
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.macro restore_user_regs, fast = 0, offset = 0
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.macro restore_user_regs, fast = 0, offset = 0
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clrex @ clear the exclusive monitor
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mov r2, sp
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mov r2, sp
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load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
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load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
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ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
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ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
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ldr lr, [sp, #\offset + S_PC] @ get pc
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ldr lr, [sp, #\offset + S_PC] @ get pc
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add sp, sp, #\offset + S_SP
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add sp, sp, #\offset + S_SP
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msr spsr_cxsf, r1 @ save in spsr_svc
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msr spsr_cxsf, r1 @ save in spsr_svc
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@ We must avoid clrex due to Cortex-A15 erratum #830321
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strex r1, r2, [sp] @ clear the exclusive monitor
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.if \fast
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.if \fast
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ldmdb sp, {r1 - r12} @ get calling r1 - r12
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ldmdb sp, {r1 - r12} @ get calling r1 - r12
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.else
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.else
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@ -91,6 +91,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
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break;
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break;
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case R_ARM_ABS32:
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case R_ARM_ABS32:
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case R_ARM_TARGET1:
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*(u32 *)loc += sym->st_value;
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*(u32 *)loc += sym->st_value;
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break;
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break;
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@ -43,7 +43,6 @@
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"mcr p15, 0, r0, c1, c0, 0 @ set SCTLR\n\t" \
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"mcr p15, 0, r0, c1, c0, 0 @ set SCTLR\n\t" \
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"isb\n\t"\
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"isb\n\t"\
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"bl v7_flush_dcache_"__stringify(level)"\n\t" \
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"bl v7_flush_dcache_"__stringify(level)"\n\t" \
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"clrex\n\t"\
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"mrc p15, 0, r0, c1, c0, 1 @ get ACTLR\n\t" \
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"mrc p15, 0, r0, c1, c0, 1 @ get ACTLR\n\t" \
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"bic r0, r0, #(1 << 6) @ disable local coherency\n\t" \
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"bic r0, r0, #(1 << 6) @ disable local coherency\n\t" \
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/* Dummy Load of a device register to avoid Erratum 799270 */ \
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/* Dummy Load of a device register to avoid Erratum 799270 */ \
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@ -17,12 +17,6 @@
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*/
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*/
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.align 5
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.align 5
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ENTRY(v6_early_abort)
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ENTRY(v6_early_abort)
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#ifdef CONFIG_CPU_V6
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sub r1, sp, #4 @ Get unused stack location
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strex r0, r1, [r1] @ Clear the exclusive monitor
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#elif defined(CONFIG_CPU_32v6K)
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clrex
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#endif
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mrc p15, 0, r1, c5, c0, 0 @ get FSR
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mrc p15, 0, r1, c5, c0, 0 @ get FSR
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mrc p15, 0, r0, c6, c0, 0 @ get FAR
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mrc p15, 0, r0, c6, c0, 0 @ get FAR
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/*
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/*
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@ -13,12 +13,6 @@
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*/
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*/
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.align 5
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.align 5
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ENTRY(v7_early_abort)
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ENTRY(v7_early_abort)
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/*
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* The effect of data aborts on on the exclusive access monitor are
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* UNPREDICTABLE. Do a CLREX to clear the state
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*/
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clrex
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mrc p15, 0, r1, c5, c0, 0 @ get FSR
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mrc p15, 0, r1, c5, c0, 0 @ get FSR
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mrc p15, 0, r0, c6, c0, 0 @ get FAR
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mrc p15, 0, r0, c6, c0, 0 @ get FAR
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@ -138,25 +138,18 @@ static int bl_enter_powerdown(struct cpuidle_device *dev,
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return idx;
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return idx;
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}
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}
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static int __init bl_idle_driver_init(struct cpuidle_driver *drv, int cpu_id)
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static int __init bl_idle_driver_init(struct cpuidle_driver *drv, int part_id)
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{
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{
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struct cpuinfo_arm *cpu_info;
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struct cpumask *cpumask;
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struct cpumask *cpumask;
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unsigned long cpuid;
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int cpu;
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int cpu;
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cpumask = kzalloc(cpumask_size(), GFP_KERNEL);
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cpumask = kzalloc(cpumask_size(), GFP_KERNEL);
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if (!cpumask)
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if (!cpumask)
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return -ENOMEM;
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return -ENOMEM;
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for_each_possible_cpu(cpu) {
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for_each_possible_cpu(cpu)
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cpu_info = &per_cpu(cpu_data, cpu);
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if (smp_cpuid_part(cpu) == part_id)
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cpuid = is_smp() ? cpu_info->cpuid : read_cpuid_id();
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/* read cpu id part number */
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if ((cpuid & 0xFFF0) == cpu_id)
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cpumask_set_cpu(cpu, cpumask);
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cpumask_set_cpu(cpu, cpumask);
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}
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drv->cpumask = cpumask;
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drv->cpumask = cpumask;
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