Add support for SB1A CPU.
Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -623,6 +623,9 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
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c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
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c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
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#endif
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#endif
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break;
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break;
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case PRID_IMP_SB1A:
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c->cputype = CPU_SB1A;
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break;
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}
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}
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}
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}
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@ -56,6 +56,7 @@ static const char *cpu_name[] = {
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[CPU_5KC] = "MIPS 5Kc",
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[CPU_5KC] = "MIPS 5Kc",
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[CPU_R4310] = "R4310",
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[CPU_R4310] = "R4310",
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[CPU_SB1] = "SiByte SB1",
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[CPU_SB1] = "SiByte SB1",
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[CPU_SB1A] = "SiByte SB1A",
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[CPU_TX3912] = "TX3912",
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[CPU_TX3912] = "TX3912",
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[CPU_TX3922] = "TX3922",
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[CPU_TX3922] = "TX3922",
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[CPU_TX3927] = "TX3927",
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[CPU_TX3927] = "TX3927",
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@ -854,6 +854,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
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case CPU_R12000:
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case CPU_R12000:
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case CPU_4KC:
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case CPU_4KC:
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case CPU_SB1:
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case CPU_SB1:
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case CPU_SB1A:
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case CPU_4KSC:
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case CPU_4KSC:
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case CPU_20KC:
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case CPU_20KC:
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case CPU_25KF:
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case CPU_25KF:
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@ -162,7 +162,7 @@
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#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
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#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
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#endif
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#endif
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#if defined(CONFIG_CPU_SB1)
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#if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
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#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
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#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
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#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */
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#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */
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#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
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#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
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@ -93,6 +93,7 @@
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*/
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*/
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#define PRID_IMP_SB1 0x0100
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#define PRID_IMP_SB1 0x0100
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#define PRID_IMP_SB1A 0x1100
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/*
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/*
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* These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT
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* These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT
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@ -194,7 +195,8 @@
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#define CPU_AU1200 59
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#define CPU_AU1200 59
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#define CPU_34K 60
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#define CPU_34K 60
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#define CPU_PR4450 61
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#define CPU_PR4450 61
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#define CPU_LAST 61
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#define CPU_SB1A 62
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#define CPU_LAST 62
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/*
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/*
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* ISA Level encodings
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* ISA Level encodings
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