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RDMA/mlx5: Fix existence check for extended address vector 

The extended address vector is the highest bit in be32 variable,
but it was compared with the lowest. This patch fixes the endianness
of that check and removes already declared define.

Fixes: 17d2f88f92 ("IB/mlx5: Add ODP atomics support")
Reviewed-by: Artemy Kovalyov <artemyko@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Leon Romanovsky 2017-08-01 09:41:37 +03:00 committed by Doug Ledford
parent efdd6f53b1
commit 931b3c1a83
2 changed files with 1 additions and 2 deletions
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2
drivers/infiniband/hw/mlx5/odp.c
View File

@ -939,7 +939,7 @@ static int mlx5_ib_mr_initiator_pfault_handler(
if (qp->ibqp.qp_type != IB_QPT_RC) { if (qp->ibqp.qp_type != IB_QPT_RC) {
av = *wqe; av = *wqe;
if (av->dqp_dct & be32_to_cpu(MLX5_WQE_AV_EXT)) if (av->dqp_dct & cpu_to_be32(MLX5_EXTENDED_UD_AV))
*wqe += sizeof(struct mlx5_av); *wqe += sizeof(struct mlx5_av);
else else
*wqe += sizeof(struct mlx5_base_av); *wqe += sizeof(struct mlx5_base_av);

1
include/linux/mlx5/qp.h
View File

@ -212,7 +212,6 @@ struct mlx5_wqe_ctrl_seg {
#define MLX5_WQE_CTRL_OPCODE_MASK 0xff #define MLX5_WQE_CTRL_OPCODE_MASK 0xff
#define MLX5_WQE_CTRL_WQE_INDEX_MASK 0x00ffff00 #define MLX5_WQE_CTRL_WQE_INDEX_MASK 0x00ffff00
#define MLX5_WQE_CTRL_WQE_INDEX_SHIFT 8 #define MLX5_WQE_CTRL_WQE_INDEX_SHIFT 8
#define MLX5_WQE_AV_EXT 0x80000000
enum { enum {
MLX5_ETH_WQE_L3_INNER_CSUM = 1 << 4, MLX5_ETH_WQE_L3_INNER_CSUM = 1 << 4,