ath9k: disable MIB interrupts to fix interrupt storm
Enabling the MIB interrupts has proven to cause an interrupt storm after 7 hours of run. We will make use of the MIB interrupt once we have ANI supported added so for now to cure this we disable the interrupt. The interrupt storm can be seen as follows after 7 hours of run as reported by Steven Noonan <steven@uplinklabs.net>: 18:28:38 sum 1106.00 18:28:39 sum 1037.62 18:28:40 sum 1069.00 18:28:41 sum 1167.00 18:28:42 sum 1155.00 18:28:43 sum 1339.00 18:28:44 sum 18355.00 18:28:45 sum 17845.45 18:28:46 sum 15285.00 18:28:47 sum 17511.00 18:28:48 sum 17568.69 18:28:49 sum 17704.04 18:28:50 sum 18566.67 18:28:51 sum 18913.13 at 18:28:44 the MIB interrupt kicked off and caused huge latency which can be seen even on a video he submitted: http://www.youtube.com/watch?v=4GeCx1gZMpA Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
4c07ab0fe4
commit
92cccc2cda
|
@ -795,6 +795,12 @@ int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
|
|||
if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
|
||||
sc->sc_imask |= ATH9K_INT_CST;
|
||||
|
||||
/* Note: We disable MIB interrupts for now as we don't yet
|
||||
* handle processing ANI, otherwise you will get an interrupt
|
||||
* storm after about 7 hours of usage making the system unusable
|
||||
* with huge latency. Once we do have ANI processing included
|
||||
* we can re-enable this interrupt. */
|
||||
#if 0
|
||||
/*
|
||||
* Enable MIB interrupts when there are hardware phy counters.
|
||||
* Note we only do this (at the moment) for station mode.
|
||||
|
@ -802,6 +808,7 @@ int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
|
|||
if (ath9k_hw_phycounters(ah) &&
|
||||
((sc->sc_opmode == ATH9K_M_STA) || (sc->sc_opmode == ATH9K_M_IBSS)))
|
||||
sc->sc_imask |= ATH9K_INT_MIB;
|
||||
#endif
|
||||
/*
|
||||
* Some hardware processes the TIM IE and fires an
|
||||
* interrupt when the TIM bit is set. For hardware
|
||||
|
|
Loading…
Reference in New Issue