OMAP4: hwmod data: Add watchdog timer
Add watchdog timer hwmod data for OMAP4 chip Note: wd_timer3 in enabled in the hwmod list but it is not yet supported by the watchdog driver. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -452,6 +452,136 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/*
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* 'wd_timer' class
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* 32-bit watchdog upward counter that generates a pulse on the reset pin on
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* overflow condition
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_wd_timer_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE |
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SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {
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.name = "wd_timer",
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.sysc = &omap44xx_wd_timer_sysc,
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};
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/* wd_timer2 */
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static struct omap_hwmod omap44xx_wd_timer2_hwmod;
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static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {
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{ .irq = 80 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
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{
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.pa_start = 0x4a314000,
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.pa_end = 0x4a31407f,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_wkup -> wd_timer2 */
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static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {
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.master = &omap44xx_l4_wkup_hwmod,
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.slave = &omap44xx_wd_timer2_hwmod,
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.clk = "l4_wkup_clk_mux_ck",
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.addr = omap44xx_wd_timer2_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* wd_timer2 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {
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&omap44xx_l4_wkup__wd_timer2,
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};
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static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
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.name = "wd_timer2",
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.class = &omap44xx_wd_timer_hwmod_class,
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.mpu_irqs = omap44xx_wd_timer2_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs),
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.main_clk = "wd_timer2_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL,
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},
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},
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.slaves = omap44xx_wd_timer2_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/* wd_timer3 */
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static struct omap_hwmod omap44xx_wd_timer3_hwmod;
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static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {
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{ .irq = 36 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
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{
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.pa_start = 0x40130000,
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.pa_end = 0x4013007f,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_abe -> wd_timer3 */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_wd_timer3_hwmod,
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.clk = "ocp_abe_iclk",
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.addr = omap44xx_wd_timer3_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs),
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.user = OCP_USER_MPU,
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};
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/* l4_abe -> wd_timer3 (dma) */
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static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = {
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{
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.pa_start = 0x49030000,
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.pa_end = 0x4903007f,
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.flags = ADDR_TYPE_RT
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},
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};
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
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.master = &omap44xx_l4_abe_hwmod,
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.slave = &omap44xx_wd_timer3_hwmod,
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.clk = "ocp_abe_iclk",
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.addr = omap44xx_wd_timer3_dma_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs),
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.user = OCP_USER_SDMA,
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};
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/* wd_timer3 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {
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&omap44xx_l4_abe__wd_timer3,
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&omap44xx_l4_abe__wd_timer3_dma,
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};
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static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
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.name = "wd_timer3",
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.class = &omap44xx_wd_timer_hwmod_class,
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.mpu_irqs = omap44xx_wd_timer3_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs),
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.main_clk = "wd_timer3_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL,
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},
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},
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.slaves = omap44xx_wd_timer3_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
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/* dmm class */
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&omap44xx_dmm_hwmod,
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@ -472,6 +602,9 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
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/* mpu class */
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&omap44xx_mpu_hwmod,
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/* wd_timer class */
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&omap44xx_wd_timer2_hwmod,
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&omap44xx_wd_timer3_hwmod,
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NULL,
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};
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