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arm64: dts: renesas: r8a77965: Add DRIF support 

Add the DRIF controller nodes for r8a77965 (a.k.a. R-Car M3-N).

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20201021135332.4928-6-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Fabrizio Castro 2020-10-21 14:53:32 +01:00 committed by Geert Uytterhoeven
parent bdf0c8ea8c
commit 92494cea40
1 changed files with 120 additions and 0 deletions
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120
arch/arm64/boot/dts/renesas/r8a77965.dtsi
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@ -1550,6 +1550,126 @@
};
};
drif00: rif@e6f40000 {
compatible = "renesas,r8a77965-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f40000 0 0x84>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 515>;
clock-names = "fck";
dmas = <&dmac1 0x20>, <&dmac2 0x20>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 515>;
renesas,bonding = <&drif01>;
status = "disabled";
};
drif01: rif@e6f50000 {
compatible = "renesas,r8a77965-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f50000 0 0x84>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 514>;
clock-names = "fck";
dmas = <&dmac1 0x22>, <&dmac2 0x22>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 514>;
renesas,bonding = <&drif00>;
status = "disabled";
};
drif10: rif@e6f60000 {
compatible = "renesas,r8a77965-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f60000 0 0x84>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 513>;
clock-names = "fck";
dmas = <&dmac1 0x24>, <&dmac2 0x24>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 513>;
renesas,bonding = <&drif11>;
status = "disabled";
};
drif11: rif@e6f70000 {
compatible = "renesas,r8a77965-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f70000 0 0x84>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 512>;
clock-names = "fck";
dmas = <&dmac1 0x26>, <&dmac2 0x26>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 512>;
renesas,bonding = <&drif10>;
status = "disabled";
};
drif20: rif@e6f80000 {
compatible = "renesas,r8a77965-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f80000 0 0x84>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 511>;
clock-names = "fck";
dmas = <&dmac1 0x28>, <&dmac2 0x28>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 511>;
renesas,bonding = <&drif21>;
status = "disabled";
};
drif21: rif@e6f90000 {
compatible = "renesas,r8a77965-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6f90000 0 0x84>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 510>;
clock-names = "fck";
dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 510>;
renesas,bonding = <&drif20>;
status = "disabled";
};
drif30: rif@e6fa0000 {
compatible = "renesas,r8a77965-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6fa0000 0 0x84>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 509>;
clock-names = "fck";
dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 509>;
renesas,bonding = <&drif31>;
status = "disabled";
};
drif31: rif@e6fb0000 {
compatible = "renesas,r8a77965-drif",
"renesas,rcar-gen3-drif";
reg = <0 0xe6fb0000 0 0x84>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 508>;
clock-names = "fck";
dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
dma-names = "rx", "rx";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 508>;
renesas,bonding = <&drif30>;
status = "disabled";
};
rcar_sound: sound@ec500000 {
/*
* #sound-dai-cells is required