ARM: davinci: aintc: drop the 00 prefix from register offsets
Since no offset goes past 0xff - let's drop the 00 prefix for better readability. While we're at it: convert all hex numbers to lower-case. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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@ -19,17 +19,17 @@
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#include "irqs.h"
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#define DAVINCI_AINTC_FIQ_REG0 0x0000
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#define DAVINCI_AINTC_FIQ_REG1 0x0004
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#define DAVINCI_AINTC_IRQ_REG0 0x0008
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#define DAVINCI_AINTC_IRQ_REG1 0x000C
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#define DAVINCI_AINTC_IRQ_IRQENTRY 0x0014
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#define DAVINCI_AINTC_IRQ_ENT_REG0 0x0018
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#define DAVINCI_AINTC_IRQ_ENT_REG1 0x001C
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#define DAVINCI_AINTC_IRQ_INCTL_REG 0x0020
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#define DAVINCI_AINTC_IRQ_EABASE_REG 0x0024
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#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x0030
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#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x004C
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#define DAVINCI_AINTC_FIQ_REG0 0x00
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#define DAVINCI_AINTC_FIQ_REG1 0x04
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#define DAVINCI_AINTC_IRQ_REG0 0x08
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#define DAVINCI_AINTC_IRQ_REG1 0x0c
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#define DAVINCI_AINTC_IRQ_IRQENTRY 0x14
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#define DAVINCI_AINTC_IRQ_ENT_REG0 0x18
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#define DAVINCI_AINTC_IRQ_ENT_REG1 0x1c
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#define DAVINCI_AINTC_IRQ_INCTL_REG 0x20
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#define DAVINCI_AINTC_IRQ_EABASE_REG 0x24
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#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x30
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#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x4c
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static void __iomem *davinci_aintc_base;
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static struct irq_domain *davinci_aintc_irq_domain;
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