drm/i915: Remove forced stop ring on suspend/unload
Before suspending (or unloading), we would first wait upon all rendering to be completed and then disable the rings. This later step is a remanent from DRI1 days when we did not use request tracking for all operations upon the ring. Now that we are sure we are waiting upon the very last operation by the engine, we can forgo clobbering the ring registers, though we do keep the assert that the engine is indeed idle before sleeping. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1470388464-28458-5-git-send-email-chris@chris-wilson.co.uk
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@ -2004,7 +2004,6 @@ struct drm_i915_private {
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/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
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struct {
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void (*cleanup_engine)(struct intel_engine_cs *engine);
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void (*stop_engine)(struct intel_engine_cs *engine);
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/**
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* Is the GPU currently considered idle, or busy executing
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@ -4080,16 +4080,6 @@ struct i915_vma *i915_gem_obj_to_ggtt_view(struct drm_i915_gem_object *obj,
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return NULL;
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}
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static void
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i915_gem_stop_engines(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_engine_cs *engine;
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for_each_engine(engine, dev_priv)
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dev_priv->gt.stop_engine(engine);
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}
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int
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i915_gem_suspend(struct drm_device *dev)
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{
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@ -4118,12 +4108,6 @@ i915_gem_suspend(struct drm_device *dev)
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i915_gem_retire_requests(dev_priv);
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/* Note that rather than stopping the engines, all we have to do
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* is assert that every RING_HEAD == RING_TAIL (all execution complete)
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* and similar for all logical context images (to ensure they are
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* all ready for hibernation).
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*/
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i915_gem_stop_engines(dev);
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i915_gem_context_lost(dev_priv);
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mutex_unlock(&dev->struct_mutex);
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@ -4308,10 +4292,8 @@ int i915_gem_init(struct drm_device *dev)
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if (!i915.enable_execlists) {
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dev_priv->gt.cleanup_engine = intel_engine_cleanup;
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dev_priv->gt.stop_engine = intel_engine_stop;
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} else {
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dev_priv->gt.cleanup_engine = intel_logical_ring_cleanup;
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dev_priv->gt.stop_engine = intel_logical_ring_stop;
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}
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/* This is just a security blanket to placate dragons.
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@ -760,31 +760,6 @@ void intel_execlists_cancel_requests(struct intel_engine_cs *engine)
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}
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}
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void intel_logical_ring_stop(struct intel_engine_cs *engine)
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{
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struct drm_i915_private *dev_priv = engine->i915;
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int ret;
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if (!intel_engine_initialized(engine))
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return;
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ret = intel_engine_idle(engine);
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if (ret)
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DRM_ERROR("failed to quiesce %s whilst cleaning up: %d\n",
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engine->name, ret);
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/* TODO: Is this correct with Execlists enabled? */
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I915_WRITE_MODE(engine, _MASKED_BIT_ENABLE(STOP_RING));
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if (intel_wait_for_register(dev_priv,
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RING_MI_MODE(engine->mmio_base),
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MODE_IDLE, MODE_IDLE,
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1000)) {
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DRM_ERROR("%s :timed out trying to stop ring\n", engine->name);
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return;
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}
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I915_WRITE_MODE(engine, _MASKED_BIT_DISABLE(STOP_RING));
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}
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static int intel_lr_context_pin(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine)
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{
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@ -1717,7 +1692,6 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *engine)
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dev_priv = engine->i915;
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if (engine->buffer) {
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intel_logical_ring_stop(engine);
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WARN_ON((I915_READ_MODE(engine) & MODE_IDLE) == 0);
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}
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@ -2203,7 +2203,6 @@ void intel_engine_cleanup(struct intel_engine_cs *engine)
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dev_priv = engine->i915;
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if (engine->buffer) {
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intel_engine_stop(engine);
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WARN_ON(!IS_GEN2(dev_priv) && (I915_READ_MODE(engine) & MODE_IDLE) == 0);
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intel_ring_unpin(engine->buffer);
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@ -2907,18 +2906,3 @@ int intel_init_vebox_ring_buffer(struct intel_engine_cs *engine)
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return intel_init_ring_buffer(engine);
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}
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void intel_engine_stop(struct intel_engine_cs *engine)
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{
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int ret;
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if (!intel_engine_initialized(engine))
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return;
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ret = intel_engine_idle(engine);
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if (ret)
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DRM_ERROR("failed to quiesce %s whilst cleaning up: %d\n",
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engine->name, ret);
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stop_ring(engine);
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}
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