[media] s5p-mfc: Flush DPB buffers during stream off
Flushing of delay DPB buffers have to be done during stream off. In MFC v6, it is done with a risc to host command. Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Signed-off-by: Arun Mankuzhi <arun.m@samsung.com> Acked-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -686,6 +686,12 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
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s5p_mfc_handle_stream_complete(ctx, reason, err);
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break;
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case S5P_MFC_R2H_CMD_DPB_FLUSH_RET:
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clear_work_bit(ctx);
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ctx->state = MFCINST_RUNNING;
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wake_up(&ctx->queue);
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goto irq_cleanup_hw;
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default:
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mfc_debug(2, "Unknown int reason\n");
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s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev);
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@ -145,6 +145,7 @@ enum s5p_mfc_inst_state {
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MFCINST_RETURN_INST,
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MFCINST_ERROR,
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MFCINST_ABORT,
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MFCINST_FLUSH,
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MFCINST_RES_CHANGE_INIT,
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MFCINST_RES_CHANGE_FLUSH,
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MFCINST_RES_CHANGE_END,
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@ -991,24 +991,35 @@ static int s5p_mfc_stop_streaming(struct vb2_queue *q)
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S5P_MFC_R2H_CMD_FRAME_DONE_RET, 0);
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aborted = 1;
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}
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spin_lock_irqsave(&dev->irqlock, flags);
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if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
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spin_lock_irqsave(&dev->irqlock, flags);
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s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->dst_queue,
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&ctx->vq_dst);
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INIT_LIST_HEAD(&ctx->dst_queue);
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ctx->dst_queue_cnt = 0;
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ctx->dpb_flush_flag = 1;
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ctx->dec_dst_flag = 0;
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spin_unlock_irqrestore(&dev->irqlock, flags);
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if (IS_MFCV6(dev) && (ctx->state == MFCINST_RUNNING)) {
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ctx->state = MFCINST_FLUSH;
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set_work_bit_irqsave(ctx);
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s5p_mfc_clean_ctx_int_flags(ctx);
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s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
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if (s5p_mfc_wait_for_done_ctx(ctx,
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S5P_MFC_R2H_CMD_DPB_FLUSH_RET, 0))
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mfc_err("Err flushing buffers\n");
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}
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}
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if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
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spin_lock_irqsave(&dev->irqlock, flags);
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s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->src_queue,
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&ctx->vq_src);
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INIT_LIST_HEAD(&ctx->src_queue);
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ctx->src_queue_cnt = 0;
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spin_unlock_irqrestore(&dev->irqlock, flags);
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}
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if (aborted)
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ctx->state = MFCINST_RUNNING;
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spin_unlock_irqrestore(&dev->irqlock, flags);
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return 0;
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}
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@ -1253,12 +1253,14 @@ int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
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static inline void s5p_mfc_set_flush(struct s5p_mfc_ctx *ctx, int flush)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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unsigned int dpb;
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if (flush)
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dpb = READL(S5P_FIMV_SI_CH0_DPB_CONF_CTRL) | (1 << 14);
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else
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dpb = READL(S5P_FIMV_SI_CH0_DPB_CONF_CTRL) & ~(1 << 14);
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WRITEL(dpb, S5P_FIMV_SI_CH0_DPB_CONF_CTRL);
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if (flush) {
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dev->curr_ctx = ctx->num;
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s5p_mfc_clean_ctx_int_flags(ctx);
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WRITEL(ctx->inst_no, S5P_FIMV_INSTANCE_ID_V6);
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s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev,
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S5P_FIMV_H2R_CMD_FLUSH_V6, NULL);
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}
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}
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/* Decode a single frame */
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@ -1650,6 +1652,9 @@ void s5p_mfc_try_run_v6(struct s5p_mfc_dev *dev)
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case MFCINST_HEAD_PARSED:
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ret = s5p_mfc_run_init_dec_buffers(ctx);
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break;
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case MFCINST_FLUSH:
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s5p_mfc_set_flush(ctx, ctx->dpb_flush_flag);
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break;
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case MFCINST_RES_CHANGE_INIT:
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s5p_mfc_run_dec_last_frames(ctx);
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break;
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