drm/i915: Generalise the clflush dma-worker
Extract the dma-fence worker used by clflush for wider use, as we anticipate using workers coupled to dma-fences more frequently. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190821191606.17001-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
parent
829e8def7b
commit
8e458fe2ee
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@ -62,6 +62,7 @@ i915-y += \
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i915_memcpy.o \
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i915_mm.o \
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i915_sw_fence.o \
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i915_sw_fence_work.o \
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i915_syncmap.o \
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i915_user_extensions.o
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@ -8,88 +8,67 @@
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#include "i915_drv.h"
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#include "i915_gem_clflush.h"
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#include "i915_sw_fence_work.h"
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#include "i915_trace.h"
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static DEFINE_SPINLOCK(clflush_lock);
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struct clflush {
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struct dma_fence dma; /* Must be first for dma_fence_free() */
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struct i915_sw_fence wait;
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struct work_struct work;
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struct dma_fence_work base;
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struct drm_i915_gem_object *obj;
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};
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static const char *i915_clflush_get_driver_name(struct dma_fence *fence)
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{
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return DRIVER_NAME;
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}
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static const char *i915_clflush_get_timeline_name(struct dma_fence *fence)
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{
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return "clflush";
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}
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static void i915_clflush_release(struct dma_fence *fence)
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{
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struct clflush *clflush = container_of(fence, typeof(*clflush), dma);
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i915_sw_fence_fini(&clflush->wait);
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BUILD_BUG_ON(offsetof(typeof(*clflush), dma));
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dma_fence_free(&clflush->dma);
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}
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static const struct dma_fence_ops i915_clflush_ops = {
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.get_driver_name = i915_clflush_get_driver_name,
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.get_timeline_name = i915_clflush_get_timeline_name,
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.release = i915_clflush_release,
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};
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static void __i915_do_clflush(struct drm_i915_gem_object *obj)
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static void __do_clflush(struct drm_i915_gem_object *obj)
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{
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GEM_BUG_ON(!i915_gem_object_has_pages(obj));
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drm_clflush_sg(obj->mm.pages);
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intel_frontbuffer_flush(obj->frontbuffer, ORIGIN_CPU);
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}
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static void i915_clflush_work(struct work_struct *work)
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static int clflush_work(struct dma_fence_work *base)
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{
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struct clflush *clflush = container_of(work, typeof(*clflush), work);
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struct drm_i915_gem_object *obj = clflush->obj;
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struct clflush *clflush = container_of(base, typeof(*clflush), base);
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struct drm_i915_gem_object *obj = fetch_and_zero(&clflush->obj);
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int err;
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if (i915_gem_object_pin_pages(obj)) {
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DRM_ERROR("Failed to acquire obj->pages for clflushing\n");
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goto out;
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}
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__i915_do_clflush(obj);
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err = i915_gem_object_pin_pages(obj);
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if (err)
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goto put;
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__do_clflush(obj);
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i915_gem_object_unpin_pages(obj);
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out:
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put:
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i915_gem_object_put(obj);
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dma_fence_signal(&clflush->dma);
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dma_fence_put(&clflush->dma);
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return err;
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}
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static int __i915_sw_fence_call
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i915_clflush_notify(struct i915_sw_fence *fence,
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enum i915_sw_fence_notify state)
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static void clflush_release(struct dma_fence_work *base)
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{
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struct clflush *clflush = container_of(fence, typeof(*clflush), wait);
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struct clflush *clflush = container_of(base, typeof(*clflush), base);
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switch (state) {
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case FENCE_COMPLETE:
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schedule_work(&clflush->work);
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break;
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if (clflush->obj)
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i915_gem_object_put(clflush->obj);
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}
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case FENCE_FREE:
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dma_fence_put(&clflush->dma);
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break;
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}
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static const struct dma_fence_work_ops clflush_ops = {
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.name = "clflush",
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.work = clflush_work,
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.release = clflush_release,
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};
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return NOTIFY_DONE;
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static struct clflush *clflush_work_create(struct drm_i915_gem_object *obj)
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{
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struct clflush *clflush;
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GEM_BUG_ON(!obj->cache_dirty);
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clflush = kmalloc(sizeof(*clflush), GFP_KERNEL);
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if (!clflush)
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return NULL;
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dma_fence_work_init(&clflush->base, &clflush_ops);
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clflush->obj = i915_gem_object_get(obj); /* obj <-> clflush cycle */
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return clflush;
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}
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bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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@ -127,32 +106,16 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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clflush = NULL;
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if (!(flags & I915_CLFLUSH_SYNC))
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clflush = kmalloc(sizeof(*clflush), GFP_KERNEL);
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clflush = clflush_work_create(obj);
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if (clflush) {
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GEM_BUG_ON(!obj->cache_dirty);
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dma_fence_init(&clflush->dma,
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&i915_clflush_ops,
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&clflush_lock,
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0, 0);
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i915_sw_fence_init(&clflush->wait, i915_clflush_notify);
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clflush->obj = i915_gem_object_get(obj);
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INIT_WORK(&clflush->work, i915_clflush_work);
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dma_fence_get(&clflush->dma);
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i915_sw_fence_await_reservation(&clflush->wait,
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obj->base.resv, NULL,
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true, I915_FENCE_TIMEOUT,
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i915_sw_fence_await_reservation(&clflush->base.chain,
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obj->base.resv, NULL, true,
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I915_FENCE_TIMEOUT,
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I915_FENCE_GFP);
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dma_resv_add_excl_fence(obj->base.resv,
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&clflush->dma);
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i915_sw_fence_commit(&clflush->wait);
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dma_resv_add_excl_fence(obj->base.resv, &clflush->base.dma);
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dma_fence_work_commit(&clflush->base);
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} else if (obj->mm.pages) {
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__i915_do_clflush(obj);
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__do_clflush(obj);
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} else {
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GEM_BUG_ON(obj->write_domain != I915_GEM_DOMAIN_CPU);
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}
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@ -0,0 +1,95 @@
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// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#include "i915_sw_fence_work.h"
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static void fence_work(struct work_struct *work)
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{
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struct dma_fence_work *f = container_of(work, typeof(*f), work);
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int err;
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err = f->ops->work(f);
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if (err)
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dma_fence_set_error(&f->dma, err);
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dma_fence_signal(&f->dma);
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dma_fence_put(&f->dma);
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}
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static int __i915_sw_fence_call
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fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
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{
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struct dma_fence_work *f = container_of(fence, typeof(*f), chain);
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switch (state) {
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case FENCE_COMPLETE:
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if (fence->error)
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dma_fence_set_error(&f->dma, fence->error);
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if (!f->dma.error) {
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dma_fence_get(&f->dma);
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queue_work(system_unbound_wq, &f->work);
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} else {
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dma_fence_signal(&f->dma);
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}
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break;
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case FENCE_FREE:
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dma_fence_put(&f->dma);
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break;
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}
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return NOTIFY_DONE;
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}
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static const char *get_driver_name(struct dma_fence *fence)
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{
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return "dma-fence";
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}
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static const char *get_timeline_name(struct dma_fence *fence)
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{
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struct dma_fence_work *f = container_of(fence, typeof(*f), dma);
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return f->ops->name ?: "work";
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}
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static void fence_release(struct dma_fence *fence)
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{
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struct dma_fence_work *f = container_of(fence, typeof(*f), dma);
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if (f->ops->release)
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f->ops->release(f);
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i915_sw_fence_fini(&f->chain);
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BUILD_BUG_ON(offsetof(typeof(*f), dma));
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dma_fence_free(&f->dma);
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}
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static const struct dma_fence_ops fence_ops = {
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.get_driver_name = get_driver_name,
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.get_timeline_name = get_timeline_name,
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.release = fence_release,
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};
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void dma_fence_work_init(struct dma_fence_work *f,
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const struct dma_fence_work_ops *ops)
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{
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spin_lock_init(&f->lock);
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dma_fence_init(&f->dma, &fence_ops, &f->lock, 0, 0);
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i915_sw_fence_init(&f->chain, fence_notify);
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INIT_WORK(&f->work, fence_work);
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f->ops = ops;
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}
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int dma_fence_work_chain(struct dma_fence_work *f, struct dma_fence *signal)
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{
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if (!signal)
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return 0;
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return __i915_sw_fence_await_dma_fence(&f->chain, signal, &f->cb);
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}
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@ -0,0 +1,44 @@
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef I915_SW_FENCE_WORK_H
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#define I915_SW_FENCE_WORK_H
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#include <linux/dma-fence.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include "i915_sw_fence.h"
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struct dma_fence_work;
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struct dma_fence_work_ops {
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const char *name;
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int (*work)(struct dma_fence_work *f);
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void (*release)(struct dma_fence_work *f);
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};
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struct dma_fence_work {
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struct dma_fence dma;
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spinlock_t lock;
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struct i915_sw_fence chain;
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struct i915_sw_dma_fence_cb cb;
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struct work_struct work;
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const struct dma_fence_work_ops *ops;
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};
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void dma_fence_work_init(struct dma_fence_work *f,
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const struct dma_fence_work_ops *ops);
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int dma_fence_work_chain(struct dma_fence_work *f, struct dma_fence *signal);
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static inline void dma_fence_work_commit(struct dma_fence_work *f)
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{
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i915_sw_fence_commit(&f->chain);
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}
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#endif /* I915_SW_FENCE_WORK_H */
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