x86, MCE, AMD: Assign interrupt handler only when bank supports it
There are some AMD CPU models which have thresholding banks but which cannot generate a thresholding interrupt. This is denoted by the bit MCi_MISC[IntP]. Make sure to check that bit before assigning the thresholding interrupt handler. Signed-off-by: Chen Yucong <slaoub@gmail.com> [ Boris: save an indentation level and rewrite commit message. ] Link: http://lkml.kernel.org/r/1412662128.28440.18.camel@debian Signed-off-by: Borislav Petkov <bp@suse.de>
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@ -212,7 +212,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
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unsigned int cpu = smp_processor_id();
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u32 low = 0, high = 0, address = 0;
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unsigned int bank, block;
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int offset = -1;
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int offset = -1, new;
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for (bank = 0; bank < mca_cfg.banks; ++bank) {
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for (block = 0; block < NR_BLOCKS; ++block) {
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@ -247,15 +247,18 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
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b.address = address;
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b.interrupt_capable = lvt_interrupt_supported(bank, high);
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if (b.interrupt_capable) {
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int new = (high & MASK_LVTOFF_HI) >> 20;
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if (!b.interrupt_capable)
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goto init;
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new = (high & MASK_LVTOFF_HI) >> 20;
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offset = setup_APIC_mce(offset, new);
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}
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mce_threshold_block_init(&b, offset);
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if (mce_threshold_vector != amd_threshold_interrupt)
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if ((offset == new) &&
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(mce_threshold_vector != amd_threshold_interrupt))
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mce_threshold_vector = amd_threshold_interrupt;
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init:
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mce_threshold_block_init(&b, offset);
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}
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}
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}
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